参数资料
型号: MAX8620YETD+T
厂商: Maxim Integrated Products
文件页数: 10/18页
文件大小: 0K
描述: IC UPMIC FOR MPU 14-TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 微型电源管理集成电路(UPMIC),DSP
输入电压: 2.7 V ~ 5.5 V
输出数: 3
输出电压: 0.6 V ~ 3.3 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x3)
包装: 带卷 (TR)
μPMIC for Microprocessors or DSPs
in Portable Equipment
IN1
MAX8620Y
PWR_ON
ERROR-
AMP 2
MOS DRIVER
WITH I LIMIT
P
OUT2
HF_PWR
ON/OFF
LOGIC
P
EN2
ERROR-
AMP 1
MOS DRIVER
WITH I LIMIT
OUT1
LDO THERMAL
1.25V
RESET
SENSOR
REF
87%
POK
TIMER
BP
GND
Figure 3. Linear-Regulator Functional Diagram
REGULATION
LDO Output-Voltage
Selection (SEL1, SEL2)
As shown in Table 1, the LDO output voltages, OUT1
and OUT2, are set according to the logic states of
SEL1 and SEL2. SEL1 and SEL2 are trilevel inputs: IN1,
open, and GND. The input voltage, V IN1 , must be a
dropout voltage (V DO ) greater than the selected OUT1
and OUT2 voltages.
Power-Enable Input (PWR_ON)
Drive PWR_ON low to place the MAX8620Y in power-
down mode and reduce supply current to 5.5μA (typ).
Connect PWR_ON to IN1 = IN2 or logic-high to enable
the MAX8620Y. EN2 enables and disables OUT2 when
PWR_ON is high (Table 2). OUT1, OUT2, and OUT3 are
all disabled when PWR_ON is low. HF_PWR can tem-
porarily bring the MAX8620 out of power-down mode
when PWR_ON is low (see the HF_PWR section). In
power-down, the control circuitry, internal-switching p-
channel MOSFET, and the internal synchronous rectifier
(n-channel MOSFET) turn off, and LX becomes high
impedance. In addition, both LDOs are disabled.
OUT2 Enable ( EN2 )
Drive EN2 low to enable OUT2. Drive EN2 high to dis-
able OUT2. If the MAX8620Y is placed into power-
down using PWR_ON (PWR_ON = low), OUT2 does not
power regardless of the status of EN2 (Table 2).
10
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