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参数资料
| 型号： | MAX8620YETD+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 12/18页 |
| 文件大小： | 0K |
| 描述： | IC UPMIC FOR MPU 14-TDFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 微型电源管理集成电路（UPMIC），DSP |
| 输入电压： | 2.7 V ~ 5.5 V |
| 输出数： | 3 |
| 输出电压： | 0.6 V ~ 3.3 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 供应商设备封装： | 14-TDFN-EP（3x3） |
| 包装： | 带卷 (TR) |
μPMIC for Microprocessors or DSPs
in Portable Equipment
Reset Output ( RESET )
RESET is an open-drain, active-low output that indi-
cates the status of OUT1. RESET is typically pulled up
through a 100k ? resistor to the system logic voltage.
RESET asserts at power-up. The reset timer begins
once V OUT1 reaches 87% of regulation. RESET
deasserts 60ms after V OUT1 rises above 87% (typ) of
regulation (see the Typical Operating Characteristics ).
RESET also asserts when OUT1 is disabled.
Reference Bypass Capacitor Node (BP)
An optional 0.01μF bypass capacitor at BP creates a
lowpass filter for LDO noise reduction. OUT1 and OUT2
exhibit 45μV RMS of output-voltage noise with C BP =
0.01μF and C OUT1 = C OUT2 = 4.7μF .
Undervoltage Lockout
V IN1 = V IN2 must exceed the 2.85V typical undervolt-
age-lockout threshold (V UVLO ) before the MAX8620Y
enables OUT3 to begin power-supply sequencing (see
the Power-Supply Sequencing section). The UVLO
threshold hysteresis is typically 0.5V.
Current Limiting
The MAX8620Y 300mA LDOs limit their output current to
I LIM_ = 550mA (typ). If the LDO output current exceeds
I LIM_ , the corresponding LDO output voltage drops. The
step-down converter limits I LIM3P to 675mA (min).
event of fault conditions. For continuous operation, do
not exceed the absolute-maximum junction-tempera-
ture rating of T J = +150°C.
Applications Information
Power-On Closed-Loop System
When the MAX8620Y is used in conjunction with a
microcontroller, HF_PWR and PWR_ON can implement
a short-key power-on closed-loop system ( Figure 5).
The MAX8620Y detects a rising edge at HF_PWR and
generates an internal 1.31s (typ) one-shot pulse that
begins power sequencing and temporarily enables
OUT1, OUT2, and OUT3 (depending on the state of
EN2 ). The 1.31s of power provides time for the proces-
sor to initialize and assert a logic-high at PWR_ON.
Once PWR_ON is driven high, OUT3, OUT1, and OUT2
(depending on the state of EN2 ) remain enabled. If the
microcontroller does not drive PWR_ON high during
t HF , the MAX8620Y disables OUT1, OUT2, and OUT3,
and reenters shutdown.
V CORE
Thermal-Overload Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8620Y. Independent thermal-protection
circuits monitor the step-down converter and the linear-
regulator circuits. When the MAX8620Y junction temper-
POWER-ON
KEY
1M ?
MAX8620Y
HF_PWR
PWR_ON
V I/O
V ANA
μ P
PWR HOLD
ature exceeds T J = +160°C, the thermal-overload
protection circuit disables the corresponding circuitry,
allowing the IC to cool. The thermal-overload protection
circuitry enables the MAX8620Y after the junction tem-
perature cools by 15°C, resulting in a pulsed output dur-
ing continuous thermal-overload conditions. Thermal-
overload protection safeguards the MAX8620Y in the
POWER-HOLD SIGNAL
Figure 5. Short-Key Power-On Closed-Loop System
12
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相关代理商/技术参数 |
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| MAX8620YEVKIT | 功能描述:PMIC 解决方案 MAX8620Y Evaluation Kit RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
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| MAX8621ETG+ | 功能描述:PMIC 解决方案 Dual Step-Down PMIC for Portable Devices RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
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| MAX8621ETG-T | 功能描述:PMIC 解决方案 Dual Step-Down PMIC for Portable Devices RoHS:否 制造商:Texas Instruments 安装风格:SMD/SMT 封装 / 箱体:QFN-24 封装:Reel |
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