参数资料
型号: MAX8655ETN+T
厂商: Maxim Integrated Products
文件页数: 19/23页
文件大小: 0K
描述: IC REG BUCK ADJ 25A 56TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.7 V ~ 5.5 V
输入电压: 4.5 V ~ 25 V
PWM 型: 电流模式
频率 - 开关: 200kHz ~ 1MHz
电流 - 输出: 25A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 56-TQFN-EP(8x8)
Highly Integrated, 25A, Wide-Input,
Internal MOSFET, Step-Down Regulator
G EA ( fc ) = g mEA C × zMOD
× R
f pMOD << f C ≤ S
The  crossover  frequency,  f C ,  should  be  much  higher
than the power-modulator pole f pMOD . Also, f C should
be less than or equal to 1/5 the switching frequency.
Select a value for f C in the range:
f
5
At the crossover frequency, the total loop gain must
equal 1, and is expressed as:
The error-amplifier gain at f C is:
f
f C
Figure 11 is the simplified gain plot for the f zMOD < f C
case.
G EA ( fc ) × G MOD ( fc ) ×
V FB
V OUT
= 1
GAIN
(dB)
CLOSED LOOP
POWER
For the case where f zMOD is greater than f C :
G EA ( fc ) = g mEA × R C
MODULATOR
ERROR
AMPLIFIER
G MOD ( fc ) = G MOD ( dc ) ×
f pMOD
f C
0dB
FB
DIVIDER
f pMOD
f zMOD
fc
FREQUENCY
Then R C can be calculated as:
R C =
V OUT
g mEA × V FB × G MOD ( fc )
Figure 11. Simplified Gain Plot for the fzMOD < fC Case
R C is calculated as:
R C = ×
where g mEA = 110μS.
The error-amplifier compensation zero formed by R C
and C C should be set at the modulator pole f PMOD .
V OUT
V FB
f C
g mEA × G MOD ( fc ) × f zMOD
Calculate the value of C C as follows:
where g mEA = 110μS.
C C =
C C =
2 π × f p
1
2 π × f pMOD × R C
If f zMOD is less than 5 x f C , add a second capacitor C F
from COMP to GND. The value of C F is:
C C is calculated from:
C F is calculated from:
1
MOD
× R C
C F =
1
2 π × R C × f zMOD
C F =
1
2 π × R C × f zMOD
As the load current decreases, the modulator pole
also decreases; however, the modulator gain increases
accordingly and the crossover frequency remains
the same.
For the case where f zMOD is less than f C :
The power modulator gain at f C is:
The current-mode control model on which the above
design procedure is based requires an additional high-
frequency term, G S (s), to account for the effect of sam-
pling the peak inductor current. The term G S (s)
produces additional phase lag at crossover and should
be modeled to estimate the phase margin obtainable
by the selected compensation components. As a final
G MOD ( fc ) = G MOD ( dc ) ×
f pMOD
f zMOD
step, it is useful to plot the dB gain and phase of the
following loop-gain transfer function and check the
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