参数资料
型号: MAX8751ETJ+T
厂商: Maxim Integrated
文件页数: 24/27页
文件大小: 0K
描述: IC CNTRLR CCFL INV 32-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: CCFL 控制器
频率: 30 ~ 80 kHz
电流 - 电源: 3.2mA
电源电压: 6 V ~ 28 V
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
Fixed-Frequency, Full-Bridge CCFL
Inverter Controller
30μA, the rise time is about three times longer than the
fall time.
Setting the Fault Delay Time
The TFLT capacitor determines the delay time for both
the open-lamp fault and secondary short-circuit fault.
The MAX8751 charges the TFLT capacitor with a 1μA
current source during an open-lamp fault and charges
the TFLT capacitor with a 126μA current source during
a secondary short-circuit fault. Therefore, the sec-
ondary short-circuit fault delay time is approximately
100 times shorter than that of the open-lamp fault. The
MAX8751 sets the fault latch when the TFLT voltage
reaches 4V. Use the following equations to calculate
the open-lamp fault delay (T OPEN_LAMP ) and sec-
ondary short-circuit fault delay (T SEC_SHORT ):
ly at the ground terminals. This is essential for stable,
jitter-free operation and high efficiency.
2) Use a star-ground configuration for power and analog
grounds. The power and analog grounds should be
completely isolated—meeting only at the center of the
star. The center should be placed at the analog
ground pin (GND). Using separate copper islands for
these grounds can simplify this task. Quiet analog
ground is used for V CC , COMP, HF, LF, and TFLT.
3) Route high-speed switching nodes away from sensi-
tive analog areas (V CC , COMP, HF, LF, and TFLT).
Make all pin-strap control input connections to analog
ground or V CC .
4) Mount the decoupling capacitor from V CC to GND as
close as possible to the IC with dedicated traces that
T OPEN _ LAMP =
T SEC _ SHORT =
C TFLT x 4 V
1 μ A
C TFLT x 4 V
126 μ A
are not shared with other signal paths.
5) The current-sense paths for LX_ to GND must be
made using Kelvin-sense connections to guarantee
the current-limit accuracy. With 8-pin MOSFETs, this
is best done by routing power to the MOSFETs from
the outside using the top copper layer, while connect-
Bootstrap Capacitors
The high-side gate drivers are powered using two boot-
strap circuits. The MAX8751 integrates the bootstrap
diodes so only two 0.1μF bootstrap capacitors are
needed. Connect the capacitors between LX1 and
BST1 and between LX2 and BST2 to complete the
bootstrap circuits.
Layout Guidelines
Careful PC board layout is important to achieve stable
operation. The high-voltage section and the switching
section of the circuit require particular attention. The high-
voltage sections of the layout need to be well separated
from the control circuit. Follow these guidelines for good
PC board layout.
1) Keep the high-current paths short and wide, especial-
ing GND and LX_ inside (underneath) the 8-pin SO
package.
6) Ensure the feedback connections are short and
direct. To the extent possible, IFB, VFB, and ISEC
connections should be far away from the high-voltage
traces and the transformer.
7) To the extent possible, high-voltage trace clearance
on the transformer’s secondary should be widely sep-
arated. The high-voltage traces should also be sepa-
rated from adjacent ground planes to prevent lossy
capacitive coupling.
8) The traces to the capacitive voltage-divider on the
transformer’s secondary need to be widely separated
to prevent arcing. Moving these traces to opposite
sides of the board can be beneficial in some cases.
24
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