参数资料
型号: MAX8810AETM+
厂商: Maxim Integrated Products
文件页数: 15/50页
文件大小: 0K
描述: IC CNTRLR PWM W/MOSFET 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 控制器,Intel VR10、VR11
输入电压: 4.5 V ~ 5.5 V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
VRD11/VRD10, K8 Rev F 2/3/4-Phase PWM
Controllers with Integrated Dual MOSFET Drivers
Pin Description (continued)
PIN
MAX8809A MAX8810A
NAME
FUNCTION
Phase 1 High-Side MOSFET Gate-Drive Supply. Connect a 0.22μF or larger ceramic
23
27
BST1
capacitor from BST1 to LX1 to supply gate drive for the high-side MOSFET. See the Boost
Capacitor Selection section for details on calculating the BST1 capacitor value.
Phase 1 Low-Side MOSFET Gate-Drive Output. Connect to the gate of the low-side MOSFET
24
28
DL1
for phase 1. DL1 is pulled low during undervoltage lockout and pulled high during an OVP
fault. DL1 is high in shutdown if V CC is greater than the UVLO threshold.
Power Ground for the Phase 1 Driver. Connect PGND1 to the source of the phase 1
25
29
PGND1
low-side MOSFET. PGND1 must be connected to PGND2 and GND externally. See the
PC Board Layout Guidelines section for more details.
Phase 1 and 2 Low-Side MOSFET Gate-Drive Supply. Connect VL12 to a 4.5V to 6.5V
26
VL12
supply. Bypass VL12 with a 2.2μF or larger ceramic capacitor to the power ground
plane.
Power Ground for the Phase 2 Driver. Connect PGND2 to the source of the phase 2
27
32
PGND2
low-side MOSFET. PGND2 must be connected to PGND1 and GND externally. See the
PC Board Layout Guidelines section for more details.
Phase 2 Low-Side MOSFET Gate-Drive Output. Connect to the gate of the low-side MOSFET
28
33
DL2
for phase 2. DL2 is pulled low during undervoltage lockout and pulled high during an OVP
fault. DL2 is high in shutdown if V CC is greater than the UVLO threshold.
Phase 2 High-Side MOSFET Gate-Drive Supply. Connect a 0.22μF or larger ceramic
29
34
BST2
capacitor from BST2 to LX2 to supply gate drive for the high-side MOSFET. See the Boost
Capacitor Selection section for details on calculating the BST2 capacitor value.
30
31
35
36
LX2
DH2
Phase 2 Inductor Sense Point. Connect LX2 to the switched side of the inductor for
phase 2.
Phase 2 High-Side MOSFET Gate-Drive Output. Connect to the gate of the high-side
MOSFET for Phase 2. DH2 is pulled low during shutdown, UVLO, and OVP faults.
VID Table Selection Input. Connect SEL to GND to select the VRD10 VID code
32
38
SEL
(Table 5). Connect SEL to V CC to select the VRD11 8-bit VID code (Table 6). Leave SEL
unconnected to select the K8 Rev F VID code (Table 4).
Voltage Identification Code Inputs. Use VID_ to set the output voltage. SEL selects the
33–40
39–46
VID7–VID0
VRD10, VRD11, or K8 Rev F VID logic codes. Connect VID_ to the system V TT with a
680 Ω resistor for logic-high for Intel VR solutions. Connect VID_ to the system V DDQ
with a 1k Ω resistor for logic-high for AMD VR solutions.
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MAX8810AETM+ 功能描述:电流型 PWM 控制器 VRD11/10 K8 Rev. F 2/3/4-Phase PWM Ctlr RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14
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