参数资料
型号: MAX9249GCM/V+
厂商: Maxim Integrated Products
文件页数: 8/36页
文件大小: 0K
描述: IC SERIALIZER GMSL LVDS 48TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 250
功能: 串行器
数据速率: 2.5Gbs
输入类型: LVDS
输出类型: 串行
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 48-TQFN 裸露焊盘
供应商设备封装: 48-TQFP(7x7)
包装: 管件
16 _____________________________________________________________________________________
MAX9249
Gigabit Multimedia Serial Link
Serializer with LVDS System Interface
VESA Standard Panel Bitmapping
and Bus-Width Selection
The LVDS input has two selectable widths, 3-channel
and 4-channel. The MAX9249 accepts the VESA stan-
dard panel 3- or 4-channel LVDS (Table 2). Inputs on the
MAX9249 are mapped internally, according to Figures 13
and 14. In 3-channel mode, RXIN3_ and CNTL1/CNTL2
are not available. For both modes, the SD/CNTL0, SCK,
and WS pins are for I2S audio. The MAX9249 accepts
clock rates from 8.33MHz to 104MHz for 3-channel mode
and 6.25MHz to 78MHz for 4-channel mode.
Serial Link Signaling and Data Format
The MAX9249 high-speed data serial output uses
CML signaling with programmable preemphasis and
AC-coupling. The GMSL deserializer uses AC-coupling
and programmable channel equalization. When using
both the preemphasis and equalization, the MAX9249/
GMSL deserializer can operate up to 3.125Gbps over
STP cable lengths to 15m or more.
The MAX9249 serializer scrambles and encodes the
LVDS input data and sends the 8B/10B coded signal
through the serial link. The GMSL deserializer recovers
Table 1. Power-Up Default Register Map (see Table 12) (continued)
REGISTER
ADDRESS
(HEX)
POWER-UP
DEFAULT
(HEX)
POWER-UP DEFAULT SETTINGS
(MSB FIRST)
0x04
0x03, 0x13,
0x83 or 0x93
SEREN = 0 (AUTOS = high), SEREN = 1 (AUTOS = low), serial link enable default depends
on AUTOS pin state at power-up
CLINKEN = 0, configuration link disabled
PRBSEN = 0, PRBS test disabled
SLEEP = 0 or 1, sleep-mode state depends on CDS and AUTOS pin state at power-up (see
the Link Startup Procedure section)
INTTYPE = 00, base mode uses I2C
REVCCEN = 1, reverse control channel active (receiving)
FWDCCEN = 1, forward control channel active (sending)
0x05
0x70
I2CMETHOD = 0, I2C packets include register address
DISFPLL = 1, filter PLL disabled
CMLLVL = 11, 400mV CML signal level
PREEMP = 0000, preemphasis off
0x06
0x40
RESERVED = 01000000
0x07
0x22
RESERVED = 00100010
0x08
0x0A
(read only)
RESERVED = 0000
LFNEG = 10, no faults detected
LFPOS = 10, no faults detected
0x0C
0x70
RESERVED = 01110000
0x0D
0x0F
SETINT = 0, interrupt output set to low
RESERVED = 00
DISRES = 0, RES mapped to DIN27
SKEWADJ = 1111, no X7PLL clock skew adjustment
0x1E
0x03
(read only)
ID = 00000011, device ID is 0x03
0x1F
0x0X
(read only)
RESERVED = 0000
REVISION = XXXX, revision number
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