参数资料
型号: MAX98089ETN+T
厂商: Maxim Integrated Products
文件页数: 111/131页
文件大小: 0K
描述: IC CODEC AUDIO FLEXSOUND 56TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: FlexSound™
类型: 立体声音频
数据接口: I²C,串行
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
S/N 比,标准 ADC / DAC (db): 93 / 101
动态范围,标准 ADC / DAC (db): 93 / 101
电压 - 电源,模拟: 1.65 V ~ 2 V
电压 - 电源,数字: 1.65 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-WFQFN 裸露焊盘
供应商设备封装: 56-TQFN-EP(7x7)
包装: 标准包装
其它名称: MAX98089ETN+TDKR
Low-Power, Stereo Audio Codec
with FlexSound Technology
Table 10. Digital Audio Interface Registers
REGISTER
BIT
NAME
DESCRIPTION
0x14/0x1C
7
MAS1/MAS2
DAI1/DAI2 Master Mode
In master mode, DAI1/DAI2 outputs LRCLK and BCLK. In slave mode, DAI1/DAI2
accept LRCLK and BCLK as inputs.
0 = Slave mode
1 = Master mode
6
WCI1/WCI2
DAI1/DAI2 Word Clock Invert
TDM1/TDM2 = 0:
0 = Left-channel data is transmitted while LRCLK is low.
1 = Right-channel data is transmitted while LRCLK is low.
TDM1/TDM2 = 1:
Always set WCI = 0.
5
BCI1/BCI2
DAI1/DAI2 Bit Clock Invert
BCI1/BCI2 must be set to 1 when TDM1/TDM2 = 1.
0 = SDIN is accepted on the rising edge of BCLK.
SDOUT is valid on the rising edge of BCLK.
1 = SDIN is accepted on the falling edge of BCLK.
SDOUT is valid on the falling edge of BCLK.
Master Mode:
0 = LRCLK transitions on the falling edge of BCLK.
1 = LRCLK transitions on the rising edge of BCLK.
4
DLY1/DLY2
DAI1/DAI2 Data Delay
DLY1/DLY2 has no effect when TDM1/TDM2 = 1.
0 = The most significant data bit is clocked on the first active BCLK edge after an
LRCLK transition.
1 = The most significant data bit is clocked on the second active BCLK edge after an
LRCLK transition.
2
TDM1/TDM2
DAI1/DAI2 Time-Division Multiplex Mode (TDM Mode)
Set TDM1/TDM2 when communicating with devices that use a frame synchronization
pulse on LRCLK instead of a square wave.
0 = Disabled
1 = Enabled (BCI1/BCI2 must be set to 1)
1
FSW1/FSW2
DAI1/DAI2 Wide Frame Sync Pulse
Increases the width of the frame sync pulse to the full data width when TDM1/TDM2 =
1. FSW1/FSW2 has no effect when TDM1/TDM2 = 0.
0 = Disabled
1 = Enabled
0
WS1/WS2
DAI1/DAI2 Audio Data Bit Depth
Determines the maximum bit depth of audio being transmitted and received. Data is
always 16 bit when TDM1/TMD2 = 0.
0 = 16 bits
1 = 24 bits
Maxim Integrated
80
MAX98089
相关PDF资料
PDF描述
MCIMX353CVM5B IC MPU I.MX35 400MAPBGA
VI-26X-IY-F1 CONVERTER MOD DC/DC 5.2V 50W
SSM2604CPZ-REEL7 IC AUDIO CODEC LP 20-LFCSP
MCIMX357DVM5B PROCESSOR MULTIMEDIA 400PBGA
VI-26W-IY-F3 CONVERTER MOD DC/DC 5.5V 50W
相关代理商/技术参数
参数描述
MAX98089EVKIT#TQFN 功能描述:音频 IC 开发工具 MAX98089 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
MAX98089EVKIT#WLP 功能描述:音频 IC 开发工具 MAX98089 Eval Kit RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
MAX98089EVKIT+TQFN 功能描述:音频 IC 开发工具 RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
MAX98089EVKIT+WLP 功能描述:音频 IC 开发工具 RoHS:否 制造商:Texas Instruments 产品:Evaluation Kits 类型:Audio Amplifiers 工具用于评估:TAS5614L 工作电源电压:12 V to 38 V
MAX98089EWY+ 制造商:Maxim Integrated Products 功能描述:STEREO AUDIO CODEC WITH FLEXSOUND TUNING TECHNOLOGY AND BASI - Rail/Tube