参数资料
型号: MAX98089ETN+T
厂商: Maxim Integrated Products
文件页数: 47/131页
文件大小: 0K
描述: IC CODEC AUDIO FLEXSOUND 56TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: FlexSound™
类型: 立体声音频
数据接口: I²C,串行
分辨率(位): 24 b
ADC / DAC 数量: 2 / 2
三角积分调变:
S/N 比,标准 ADC / DAC (db): 93 / 101
动态范围,标准 ADC / DAC (db): 93 / 101
电压 - 电源,模拟: 1.65 V ~ 2 V
电压 - 电源,数字: 1.65 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-WFQFN 裸露焊盘
供应商设备封装: 56-TQFN-EP(7x7)
包装: 标准包装
其它名称: MAX98089ETN+TDKR
Low-Power, Stereo Audio Codec
with FlexSound Technology
AUDIO INTERFACE TIMING CHARACTERISTICS
(VAVDD = VPVDD = VDVDD = VDVDDS1 = VDVDDS2 = 1.8V, VSPKLVDD = VSPKRVDD = 3.7V, TA = +25NC, unless otherwise noted.)
(Note 1)
Figure 1. Non-TDM Audio Interface Timing Diagrams (TDM_ = 0)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BCLK Cycle Time
tBCLK
Slave mode
90
ns
BCLK High Time
tBCLKH
Slave mode
20
ns
BCLK Low Time
tBCLKL
Slave mode
20
ns
BCLK or LRCLK Rise and Fall Time
tR, tF
Master mode, CL = 15pF
5
ns
SDIN to BCLK Setup Time
tSETUP
20
ns
LRCLK to BCLK Setup Time
tSYNCSET
Slave mode
20
ns
SDIN to BCLK Hold Time
tHOLD
20
ns
LRCLK to BCLK Hold Time
tSYNCHOLD Slave mode
20
ns
Minimum Delay Time from LSB
BCLK Falling Edge to
High-Impedance State
tHIZOUT
Master mode, TDM_ = 1
42
ns
LRCLK Rising Edge to SDOUT
MSB Delay
tSYNCTX
CL = 30pF, TDM_ = 1, FSW_ = 1
50
ns
BCLK to SDOUT Delay
tCLKTX
CL = 30pF
TDM_ = 1, BCLK rising edge
50
ns
TDM_ = 0
50
Delay Time from BCLK to LRCLK
tCLKSYNC
Master
mode
TDM_ = 1
-15
+15
ns
TDM_ = 0
0.8 x
tBCLKL
Delay Time from LRCLK to BCLK
After LSB
tENDSYNC
Master
mode
TDM_ = 1, FSW_ = 1
20
ns
tR
tCLKTX
tSETUP tHOLD
tBCLK
tBCLKH
tBCLKL
MSB
LSB
BCLK
(OUTPUT)
LRCLK
(OUTPUT)
SDOUT
(OUTPUT)
SDIN
(INPUT)
BCLK
(INPUT)
LRCLK
(INPUT)
SDOUT
(OUTPUT)
SDIN
(INPUT)
MASTER MODE
tSETUP tHOLD
MSB
LSB
HI-Z
SLAVE MODE
HI-Z
MSB
tCLKSYNC
tF
tHIZOUT
tCLKTX
tSYNCSET
tHIZOUT
Maxim Integrated
22
MAX98089
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