MAX9961/MAX9962
Dual, Low-Power, 500Mbps
ATE Drivers/Comparators with 2mA Load
10
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Note 10: Specifications measured at the end points of the full range. Full ranges are -1.3V
≤ VDHV_ ≤ +6.5V, -1.5V ≤ VDLV_ ≤ +6.3V,
-1.5V
≤ VDTV_ ≤ +6.5V.
Note 11: Change in offset voltage with power supplies independently set to their minimum and maximum values.
Note 12: Nominal target value is 50
. Contact factory for alternate trim selections within the 45 to 51 range.
Note 13: VDTV_ = +1.5V, RS = 50
. External signal driven into T-line is a 0 to +3V edge with 1.2ns rise time (10% to 90%).
Measurement is made using the comparator.
Note 14: Measured from the crossing point of DATA_ inputs to the settling of the driver output.
Note 15: Prop delays are measured from the crossing point of the differential input signals to the 50% point of the expected output
swing. Rise time of the differential inputs DATA_ and RCV_ is 250ps (10% to 90%).
Note 16: Rising edge to rising edge or falling edge to falling edge.
Note 17: Specified amplitude is programmed. At this pulse width, the output reaches at least 95% of its nominal (DC) amplitude.
The pulse width is measured at DATA_.
Note 18: Specified amplitude is programmed. Maximum data rate is specified in transitions per second. A square wave that reach-
es at least 95% of its programmed amplitude may be generated at one-half this frequency.
Note 19: Crosstalk from either driver to the other. Aggressor channel is driving 3VP-P into a 50
load. Victim channel is in term
mode with VDTV_ = +1.5V.
Note 20: Indicative of switching speed from DHV_ or DLV_ to DTV_ and DTV_ to DHV_ or DLV_ when VDLV_ < VDTV_ < VDHV_. If
VDTV_ < VDLV_ or VDTV_ > VDHV_, switching speed is degraded by a factor of approximately 3.
Note 21: Change in offset voltage over the input range.
Note 22: Unless otherwise noted, all propagation delays are measured at 40MHz, VDUT_ = 0 to +2V, VCHV_ = VCLV_ = +1V, slew
rate = 2V/ns, ZS = 50
, driver in term mode with VDTV_ = 0. Comparator outputs are terminated with 50 to GND at scope
input with VCCO_ = 2V. Open-collector outputs are also terminated (internally or externally) with RTERM = 50
to VCCO_.
Measured from VDUT_ crossing calibrated CHV_ / CLV_ threshold to crossing point of differential outputs.
Note 23: VDUT_ = 0 to +1V, VCHV_ = VCLV _ = +0.5V. At this pulse width, the output reaches at least 90% of its DC voltage swing.
The pulse width is measured at the crossing points of the differential outputs.
Note 24: Relative to propagation delay at VCHV_ = VCLV_ = +1.5V. VDUT_ = 200mVP-P. Overdrive = 100mV.
Note 25: Relative to straight line between 0.5V and 2.5V.
Note 26: Measured from crossing of input signals to the 10% point of the output voltage change.
Note 27: VCOM_ = 1.5V, ZS = 50
, driving voltage = 3V to 0 transition and 0 to 3V transition. Settling time is measured from VDUT_
= 1.5V to ISINK or ISOURCE settling within specified tolerance.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ = +2.5V, SC1 = SC0 = 0, VCPHV_ = +7.2V, VCPLV_ = -2.2V, VLDH_ = VLDL_ = 0, VGS = 0, TJ =
+85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1)
Typical Operating Characteristics
DRIVER LARGE-SIGNAL RESPONSE
MAX9961/62
toc02
V
DUT_
=
500mV/div
t = 2.50ns/div
VDLV_ = 0
RL = 50
VDHV_ = 5V
VDHV_ = 3V
VDHV_ = 1V
0
DRIVER TRAILING-EDGE TIMING ERROR
vs. PULSE WIDTH
MAX9961/62
toc03
PULSE WIDTH (ns)
TIMING
ERROR
(ps)
20
15
10
5
-80
-60
-40
-20
0
20
40
-100
025
LOW PULSE
HIGH PULSE
NORMALIZED TO PW = 12.5ns
PERIOD = 25ns, VDHV_ = 3V, VDLV_ = 0
DRIVER SMALL-SIGNAL RESPONSE
MAX9961/62
toc01
V
DUT_
=
50mV/div
t = 2.50ns/div
VDLV_ = 0
RL = 50
VDHV_ = 200mV
VDHV_ = 100mV
VDHV_ = 500mV
0