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参数资料
型号： MAX9961BLCCQ-TD
厂商： MAXIM INTEGRATED PRODUCTS INC
元件分类： 比较器
英文描述： Dual, Low-Power, 500Mbps ATE Drivers/Comparators with 2mA Load
中文描述： DUAL COMPARATOR, 100000 uV OFFSET-MAX, 2.2 ns RESPONSE TIME, PQFP100
封装： 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, TQFP-100
文件页数： 30/30页
文件大小： 740K
代理商： MAX9961BLCCQ-TD
MAX9961/MAX9962
Dual, Low-Power, 500Mbps
ATE Drivers/Comparators with 2mA Load
_______________________________________________________________________________________
9
Note 1:
All minimum and maximum limits are 100% production tested. Tests are performed at nominal supply voltages unless oth-
erwise noted.
Note 2:
Total for dual device at worst-case setting; driver enabled and load disabled. RL
≥ 10M. The supply currents are mea-
sured with typical supply voltages.
Note 3:
Does not include internal dissipation of the comparator outputs. For MAX996_ _LCCQ, additional power dissipation is typi-
cally (32mA) x (VVCCO).
Note 4:
Externally forced voltages can exceed this range provided that the Absolute Maximum Ratings are not exceeded.
Note 5:
Transition time from LLEAK being asserted to leakage current dropping below specified limits.
Note 6:
Transition time from LLEAK being deasserted to output returning to normal operating mode.
Note 7:
Based on simulation results only.
Note 8:
With the exception of Offset and Gain/CMRR tests, reference input values are calibrated for offset and gain.
Note 9:
Relative to straight line between 0 and 4.5V.
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +9.75V, VEE = -5.25V, VCCO_ = +2.5V, SC1 = SC0 = 0, VCPHV_ = +7.2V, VCPLV_ = -2.2V, VLDH_ = VLDL_ = 0, VGS = 0, TJ =
+85°C, unless otherwise noted. All temperature coefficients are measured at TJ = +70°C to +100°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VLDL_ = 100mV
±0.7
±4
Source-Current Power-Supply
Rejection Ratio
PSRR
VLDL_ = 5V
±3
±100
A/V
Source-Current Linearity (Note 25)
VLDL_ = 100mV, 1.25V, 5V
±2
±10
A
SINK CURRENT (VDUT_ = 0, VCOM_ = +2.5V)
Maximum Sink Current
VLDH_ = 5.5V
-2.3
-2.2
-2.1
mA
Sink Programming Gain
ATC
VLDH_ = 1.25V to 5V
-408
-400
-392
mA/V
Sink Current Offset (Combined
Offset of LDH_ and GS)
IOS
VLDH_ = 20mV
-10
+5
A
VLDH_ = 100mV
+0.05
Sink-Current Temperature
Coefficient
VLDH_ = 5V
+0.4
A/°C
VLDH_ = 100mV
±1.3
±4
Sink-Current Power-Supply
Rejection Ratio
PSRR
VLDH_ = 5V
±3.7
±100
A/V
Sink-Current Linearity
VLDH_ = 100mV, 1.25V, 5V (Note 25)
±10
±25
A
GROUND SENSE (GS)
Voltage Range
VGS
Verified by GS common-mode error test
±250
mV
VDUT_ = 0, VCOM_ = +2.5V,
VGS =
±250mV, VLDH_ - VGS = 2.5V
±5
Common-Mode Error
VDUT_ = 5V, VCOM_ = +2.5V,
VGS =
±250mV, VLDL_ - VGS = 2.5V
±5
A
Input Bias Current
VGS = 0
±25
A
AC CHARACTERISTICS (ZL = 50
to GND)
ISOURCE = 2mA, VCOM_ = -1.5V
2.5
Enable Time (Note 26)
tEN
ISINK = 2mA, VCOM_ = +1.5V
2.2
ns
ISOURCE = 2mA, VCOM_ = -1.5V
1.7
Disable Time (Note 26)
tDIS
ISINK = 2mA, VCOM_ = +1.5V
1.7
ns
To 10%
0.4
Current Settling Time on
Commutation
ISOURCE = ISINK = 500A
(Notes 7 and 27)
To 1%
1.1
ns
Spike During Enable/Disable
Transition
ISOURCE = ISINK = 2mA, VCOM_ = 0
30
mV
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