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参数资料
| 型号： | MB9BF504NPMC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 118/120页 |
| 文件大小： | 1277K |
| 代理商： | MB9BF504NPMC |
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97
8266D-MCU Wireless-06/12
ATmega128RFA1
Figure 9-36. ECB Mode - Decryption
Block Cipher
Decryption
Key
Plaintext
Ciphertext
Block Cipher
Decryption
Key
Plaintext
Ciphertext
Due to the nature of AES algorithm the initial key to be used when decrypting is not the
same as the one used for encryption. Instead it is the last round key. This last round
key is the content of the key address space stored after running one full encryption
cycle and must be saved for decryption. If the decryption key has not been saved, it has
to be recomputed by first running a dummy encryption (of an arbitrary plain text) using
the original encryption key. Then the resulting round key must be fetched from the key
memory and written back into the key memory as the decryption key.
ECB decryption is not used by either IEEE 802.15.4 or ZigBee frame security. Both of
these standards do not directly encrypt the payload. Instead they protect the payload by
applying a XOR operation between the original payload and the resulting (AES-) cipher
text with a nonce (number used once). As the nonce is the same for encryption and
decryption only ECB encryption is required. Decryption is performed by a XOR
operation between the received cipher text and its own encryption result concluding in
the original plain text payload upon success.
9.8.8.4.2 Cipher Block Chaining (CBC)
In CBC mode the result of a previous AES operation is XOR-combined with the new
incoming vector forming the new plain text to encrypt as shown in the next figure. This
mode is used for the computation of a cryptographic checksum (message integrity
code, MIC).
Figure 9-37. CBC Mode - Encryption
Block Cipher
Encryption
Key
Ciphertext
Block Cipher
Encryption
Plaintext
Ciphertext
Plaintext
Initialization Vector (IV)
Encryption
Key
ECB
mode
CBC
mode
After preparing the AES key and defining the AES operation direction register bit
AES_DIR, the data has to be provided to the AES engine and the CBC operation can
be started.
The first CBC run has to be configured as ECB to process the initial data (plain text
XOR with an initialization vector provided by the application software). All succeeding
AES runs are to be configured as CBC by setting bit AES_MODE = 1 (AES_CTRL
register). Bit AES_DIR (AES_CTRL register) must be set to AES_DIR = 0 to enable
AES encryption. The data to be processed has to be transferred to the AES_STATE
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相关代理商/技术参数 |
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| MB9BF504RPMC | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:Family of 32-bit MCUs |
| MB9BF504RPMC-GE1 | 功能描述:IC MCU 32BIT 256KB FLASH 120LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:FM3 MB9B500 产品培训模块:MCU Product Line Introduction XMEGA Introduction AVR XMEGA USB Connectivity 标准包装:90 系列:AVR® XMEGA 核心处理器:AVR 芯体尺寸:8/16-位 速度:32MHz 连通性:I²C，IrDA，SPI，UART/USART 外围设备:欠压检测/复位，DMA，POR，PWM，WDT 输入/输出数:50 程序存储器容量:192KB（96K x 16） 程序存储器类型:闪存 EEPROM 大小:4K x 8 RAM 容量:16K x 8 电压 - 电源 (Vcc/Vdd):1.6 V ~ 3.6 V 数据转换器:A/D 16x12b; D/A 2x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:64-TQFP 包装:托盘 配用:ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFPATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
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| MB9BF506NAPMC-G-JNE1 | 制造商:FUJITSU 功能描述: 制造商:FUJITSU 功能描述:MCU 32BIT CORTEX-M3 FM3 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP 制造商:FUJITSU 功能描述:MCU, 32BIT, CORTEX-M3, FM3, 100LQFP, Controller Family/Series:ARM Cortex-M3, Core Size:32bit, No. of I/O's:80, Supply Voltage Min:2.7V, Supply Voltage Max:5.5V, Digital IC Case Style:LQFP, No. of Pins:100, Program Memory Size:512KB, , RoHS Compliant: Yes |
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