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| 型号： | MC33298 |
| 厂商： | 飞思卡尔半导体(中国)有限公司 |
| 英文描述： | Eight Output Switch with Serial Peripheral Interface I/O(带SPI接口的八输出开关) |
| 中文描述： | 8个串行外围接口的I / O（带的SPI接口的八输出开关输出开关） |
| 文件页数： | 18/28页 |
| 文件大小： | 642K |
| 代理商： | MC33298 |
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33298
18
Go to: www.freescale.com
FAULT LOGIC OPERATION
Introduction
The MCU can perform a parity check of the fault logic
operation by comparing the command 8-bit word to the status
8-bit word. Assume after system reset, the MCU first sends an
8-bit command word to the 33298. This word is called
Command Word 1. Each output to be turned ON will have its
corresponding data bit low. Refer to the data transfer timing
illustration in Figure 16.
As Command Word 1 is being written into the Shift register
of the 33298, a status word is being simultaneously written and
received by the MCU. However, the word being received by the
MCU is the status of the previous write word to the 33298,
Status Word 0. If the command word of the MCU is written a
second time (Command Word 2 = Command Word 1), the word
received by the MCU, Status Word 2, is the status of Command
Word 1. The timing diagram illustrated in Figure 16 depicts this
operation. Status Word 2 is then compared with Command
Word 1. The MCU will Exclusive OR Status Word 2 with
Command Word 1 to determine if the two words are identical. If
the two words are identical, faults do not exist. The timing
between the two write words must be greater than 100 μs to
receive proper drain status. The system data bus integrity may
be tested by writing two like words to the 33298 within a few
microseconds of each other.
Initial System Setup Timing
The MCU can monitor two kinds of faults:
1. Communication errors on the data bus
2. Actual faults of the output loads
After initial system start up or reset, the MCU will write one
word to the 33298. If the word is repeated within approximately
five microseconds of the first word, the word received by the
MCU, at the end of the repeated word, serves as a confirmation
of data bus integrity (1). At start up, the 33298 will take 25 to 100
μs before a repeat of the first word should be repeated at least
100 μs later to verify the status of the outputs.
The SO of the 33298 will indicate any one of four faults. The
four possible faults are:
1. Over Temperature
2. Output OFF Open Fault
3. Short Fault (over current)
4. V
PWR
Over Voltage Fault.
All of these faults, with the exception of the Over Voltage Fault,
are output specific. Over Temperature Detect, Output OFF
Open Detect, and Output Short Detect are dedicated to each
output separately such that the outputs are independent in
operation. A V
PWR
Over Voltage Detect is a
global
nature
causing all outputs to be turned OFF.
Over Temperature Fault
Patent pending Over Temperature Detect and shutdown
circuits are specifically incorporated for each individual output.
The shutdown following an Over Temperature condition is
independent of the system clock and other logic signal. Each
independent output shuts down at 155°C to 185°C. When an
output shuts down due to an Over Temperature Fault, no other
outputs are affected. The MCU recognizes the fault since the
output was commanded to be ON and the status word indicates
it is OFF. A maximum hysteresis of 20°C ensures an adequate
time delay between output turn OFF and recovery. This avoids
a very rapid turn ON and turn OFF of the device around the
Over Temperature threshold. When the temperature falls below
the recovery level for the Over Temperature Fault, the device
will turn on only if the Command Word during the next write
cycle indicates the output should be turned ON.
Over Voltage Fault
An Over Voltage condition on the V
PWR
pin causes the 33298
to shut down all outputs until the over voltage condition is
removed and the device is re-programmed by the SPI. The over
voltage threshold on the V
PWR
pin is specified as 28 V to 36 V
with 1.0 V typical hysteresis. Following the over voltage
condition, the next write cycle sends the SO pin the
hexadecimal word $FF (all ones) indicating all outputs are
turned
off
. In this way, potentially dangerous timing problems
are avoided and the MCU reset routine ensures an orderly
startup of the loads. The 33298 does not detect an over voltage
on the V
DD
pin. Other external circuitry, such as the Motorola
33161 Universal Voltage Monitor, is necessary to accomplish
this function.
Output OFF Open Load Fault
An Output OFF Open Load Fault is the detection and
reporting of an
open
load when the corresponding output is
disabled (input in a logic high state). To understand the
operation of the Open Load Fault detect circuit; see Figure 17.
The Output OFF Open Load Fault is detected by comparing the
drain voltage of the specific MOSFET output to an internally
generated reference. Each output has one dedicated
comparator for this purpose.
Figure 17. Output OFF Open Load Fault
V
Thres
2.5 to 3.5 V
+
Low = Fault
50 μA
Output
V
PWR
R
L
33298
MOSFET OFF
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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