参数资料
型号: MC56F8011VFAE
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封装: ROHS COMPLIANT, LQFP-32
文件页数: 90/125页
文件大小: 1702K
代理商: MC56F8011VFAE
Register Descriptions
56F8013/56F8011 Data Sheet, Rev. 11
Freescale Semiconductor
67
Figure 6-1 SIM Register Map Summary
6.3.1
SIM Control Register (SIM_CTRL)
Figure 6-2 SIM Control Register (SIM_CTRL)
6.3.1.1
Timer Channel 3 Stop Disable (TC3_SD)—Bit 15
This bit enables the operation of the Timer Channel 3 peripheral clock in Stop mode.
0 = Timer Channel 3 disabled in Stop mode
Add.
Offset
Address
Acronym
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
$0
SIM_
CTRL
R
TC3_
SD
TC2_
SD
TC1_
SD
TC0_
SD
SCI_
SD
0
TC3_
INP
0
ONCE
EBL0
SW
RST
STOP_
DISABLE
WAIT_
DISABLE
W
$1
SIM_
RSTAT
R
0
SWR
COPR EXTR
POR
0
W
$2
SIM_SWC0
R
Software Control Data 0
W
$3
SIM_SWC1
R
Software Control Data 1
W
$4
SIM_SWC2
R
Software Control Data 2
W
$5
SIM_SWC3
R
Software Control Data 3
W
$6
SIM_MSHID
R
0
1
0
1
0
W
$7
SIM_LSHID
R
0
1
0
1
0
1
W
$8
SIM_PWR
R
0
LRSTDBY
W
Reserved
$A
SIM_
CLKOUT
R
0
PWM3PWM2PWM1PWM0
CLK
DIS
CLKOSEL
W
$B
SIM_GPS
R
TCR
PCR
0
CFG_
B7
CFG_
B6
CFG_
B5
CFG_
B4
CFG_
B3
CFG_
B2
CFG_
B1
CFG_
B0
CFG_A5
CFG_A4
W
$C
SIM_PCE
R
I2C
0
ADC
0
TMR
0
SCI
0
SPI
0
PWM
W
$D
SIM_IOSAHI
R
0
ISAL[23:22]
W
$E
SIM_IOSALO
R
ISAL[21:6]
W
0
= Read as 0
1
= Read as 1
= Reserved
Base + $0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
TC3_
SD
TC2_
SD
TC1_
SD
TC0_
SD
SCI_
SD
0
TC3_
INP
0
ONCE
EBL
SW
RST
STOP_
DISABLE
WAIT_
DISABLE
Write
RESET
0
00
0
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