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参数资料
| 型号： | MC56F8013MFAE |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 109/126页 |
| 文件大小： | 0K |
| 描述： | IC DIGITAL SIGNAL CTLR 32-LQFP |
| 标准包装： | 1,250 |
| 系列： | 56F8xxx |
| 核心处理器： | 56800E |
| 芯体尺寸： | 16-位 |
| 速度： | 32MHz |
| 连通性： | I²C，SCI，SPI |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 26 |
| 程序存储器容量： | 16KB（8K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 2K x 16 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 数据转换器： | A/D 6x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 32-LQFP |
| 包装： | 托盘 |
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Clocks
56F8013/56F8011 Data Sheet, Rev. 12
Freescale Semiconductor
83
6.7 Clocks
The memory, peripheral and core clocks all operate at the same frequency (32MHz max) with the
exception of the Quad Timer and PWM peripheral clocks, which have the option (using TCR and PCR) to
operate three times faster. The SIM is responsible for stalling individual clocks as a response to various
hold-off requests, low power modes, and other configuration parameters. The SIM has access to the
following signals from the OCCS module:
While the SIM generates the ADC peripheral clock in the same way it generates all other peripheral clocks,
the ADC standby and conversion clocks are generated by a direct interface between the ADC and the
OCCS module.
Figure 6-16 illustrates clock relationships to one another and to the various resets as the device comes out
of reset. RST is assumed to be the logical AND of all active-low system resets (for example, POR, external
reset, COP and Software reset). In the 56F8013/56F8011 architecture, this signal will be stretched by the
SIM for a period of time (up to 96 MSTR_OSC clock cycles, depending upon the status of the POR) to
create the clock generation reset signal (CLKGEN_RST). The SIM should deassert CLKGEN_RST
synchronously with the negative edge of OSC_CLK in order to avoid skew problems. CLKGEN_RST is
delayed 32 SYS_CLK cycles to create the peripheral reset signal (PERIP_RST). PERIP_RST is then
delayed by 32 SYS_CLK cycles to create CORE_RST. Both PERIP_RST and CORE_RST should be
released on the negative edge of SYS_CLK_D as shown. This phased releasing of system resets is
necessary to give some peripherals (for example, the Flash interface unit) set-up time prior to the 56800E
core becoming active.
MSTR_OSC
This comes from the input clock source mux of the OCCS. It is the output of the
relaxation oscillator or the external clock source, depending on PRECS. It is not
guaranteed to be at 50% duty cycle (+ or - 10% can probably be assumed for design
purposes). This clock runs continuously, even during resetm and is used for reset
generation.
HS_PERF
The PLL multiplies the MSTR_OSC by 24, to a maximum of 192MHz. The ZSRC
field in OCCS selects the active source to be the PLL. This is divided by 2 and
postscaled to produce this maximum 96MHz clock. It is used without further division
to produce the high-speed (3x system bus rate) variants of the Quad Timer and PWM
peripheral clocks. This clock is disabled when ZSRC is selecting MSTR_OSC.
SYS_CLK_x2
The PLL can multiply the MSTR_OSC by 24, to a maximum of 192MHz. When the
PLL is selected by the OCCS ZSRC field, the PLL is divided by three and postscaled
to produce this maximum 64MHz clock. When MSTR_OSC is selected by the OCCS
ZSRC field, MSTR_OSC feeds SYS_CLK_x2 directly. The SIM takes this clock and
divides it by two to generate all the normal (1x system bus rate) peripheral and system
clocks.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC56F8013MFAER2 | 制造商:Freescale Semiconductor 功能描述:16 BIT DSPHC ANGUILLA - Tape and Reel |
| MC56F8013PB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| MC56F8013VFAE | 功能描述:数字信号处理器和控制器 - DSP, DSC 16 BIT DSPHC ANGUILLA RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8013VFAER2 | 功能描述:数字信号处理器和控制器 - DSP, DSC 16 BIT DSPHC ANGUILLA RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| MC56F8014 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
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