参数资料
型号: MC56F8357VPY60
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 数字信号处理
英文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP160
封装: PLASTIC, LQFP-160
文件页数: 111/177页
文件大小: 4091K
代理商: MC56F8357VPY60
Introduction
56F8357 Technical Data, Rev. 15
Freescale Semiconductor
39
Preliminary
Part 3 On-Chip Clock Synthesis (OCCS)
3.1 Introduction
Refer to the OCCS chapter of the 56F8300 Peripheral User Manual for a full description of the OCCS.
The material contained here identifies the specific features of the OCCS design. Figure 3-1 shows the
specific OCCS block diagram to reference from the OCCS chapter of the 56F8300 Peripheral User
Manual.
Figure 3-1 OCCS Block Diagram
3.2 External Clock Operation
The system clock can be derived from an external crystal, ceramic resonator, or an external system clock
signal. To generate a reference frequency using the internal oscillator, a reference crystal or ceramic
resonator must be connected between the EXTAL and XTAL pins.
3.2.1
Crystal Oscillator
The internal oscillator is also designed to interface with a parallel-resonant crystal resonator in the
frequency range specified for the external crystal in Table 10-13. A recommended crystal oscillator circuit
is shown in Figure 3-2. Follow the crystal supplier’s recommendations when selecting a crystal, since
MUX
EXTAL
XTAL
FEEDBACK
LCK
Prescaler CLK
Postscaler CLK
FOUT/2
Crystal
OSC
Loss of
Reference
Clock
Detector
Lock
Detector
ZSRC
Bus Interface & Control
FOUT
F
REF
PLLDB
PLLCOD
PLLCID
Bus
Interface
Loss of Reference
Clock Interrupt
SYS_CLK2
Source to SIM
MUX
CLKMODE
÷2
Prescaler
÷ (1,2,4,8)
Postscaler
÷ (1,2,4,8)
MS
TR
_O
S
C
PLL
x (1 to 128)
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MC56F8357,
MC56F8157
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