参数资料
型号: MC68838FCC
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 1 CHANNEL(S), 125M bps, FDDI CONTROLLER, CQFP120
封装: CERAMIC, QFP-120
文件页数: 12/100页
文件大小: 465K
代理商: MC68838FCC
MOTOROLA
MC68838 USER’S MANUAL
2-7
This logic block is connected to the receive data path to be able to load a bid time
register from claim frames that are being received. ln addition, it receives signals to
enable/disable the TVX timer and to reset the TVX timer from the receiver FSM. Its only
outputs (other than to the NPI) are TRT expired, TVX expired, THT expired, and
LATE_CT equals zero interrupts.
2.3.7 Transmit Data Latch (and Repeat Function)
This logic block contains the repeat function and multiplexes the repeat path with
FRAME_DATA from the send frame logic block. The repeat function reads symbol pairs
from the receive data path and repeats them to the ELM. Usually this logic transmits the
symbol pair just received, but when receiving the FS indicators, the logic may need to
modify the received R and S symbols according to the values in the frame status logic
and the values in the register associated with repeating additional FS symbols. Also, this
logic selectively replaces the last symbol pair with an IDLE symbol pair when a frame is
detected as a fragment.
2.4 TEST AND CLOCK LOGIC
The MAC supports complete boundary scan testing and random access reading of
almost all of the internal chip state through the NPI. Boundary scanning means that
every signal on this chip (other than the
MATCH signal, the test signals, and clocks) has
an associated scan latch that enables the testing interface to serially shift in an arbitrary
bit pattern to be used for the corresponding input or output signal and to shift out the
values of these signals while holding the clock. The MAC also has a built-in self-test
capability.
ARCHIVE
INFORMA
TION
ARCHIVE
INFORMA
TION
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