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参数资料
| 型号： | MC68HC05SR3CB |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | SDIP-42 |
| 文件页数： | 52/96页 |
| 文件大小： | 612K |
| 代理商： | MC68HC05SR3CB |
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MOTOROLA
8-2
MC68HC05SR3
CPU CORE AND INSTRUCTION SET
8
8.1.2
Index register (X)
The index register is an 8-bit register, which can contain the indexed addressing value used to
create an effective address. The index register may also be used as a temporary storage area.
8.1.3
Program counter (PC)
The program counter is a 16-bit register, which contains the address of the next byte to be fetched.
8.1.4
Stack pointer (SP)
The stack pointer is a 16-bit register, which contains the address of the next free location on the
stack. During an MCU reset or the reset stack pointer (RSP) instruction, the stack pointer is set to
location $00FF. The stack pointer is then decremented as data is pushed onto the stack and
incremented as data is pulled from the stack.
When accessing memory, the ten most signicant bits are permanently set to 0000000011. These
ten bits are appended to the six least signicant register bits to produce an address within the
range of $00C0 to $00FF. Subroutines and interrupts may use up to 64 (decimal) locations. If 64
locations are exceeded, the stack pointer wraps around and overwrites the previously stored
information. A subroutine call occupies two locations on the stack; an interrupt uses ve locations.
8.1.5
Condition code register (CCR)
The CCR is a 5-bit register in which four bits are used to indicate the results of the instruction just
executed, and the fth bit indicates whether interrupts are masked. These bits can be individually
tested by a program, and specic actions can be taken as a result of their state. Each bit is
explained in the following paragraphs.
Half carry (H)
This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4.
Figure 8-2 Stacking order
Condition code register
Accumulator
Index register
Program counter high
Program counter low
70
Stack
Unstack
Decreasing
memory
address
Increasing
memory
address
Interr
upt
Retur
n
TPG
54
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| MC68HC05SR3P | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC05SU3A | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Fully static chip design featuring the industry standard 8-bit M68HC05 core |
| MC68HC05T16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit |
| MC68HC05V12 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontreller Unit |
| MC68HC05V12CFN | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05X16 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor HCMOS) microcontroller unit |
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