- 您现在的位置：买卖IC网 > PDF目录69027 > MC68HC08AS20CFN (MOTOROLA INC) 8-BIT, MROM, MICROCONTROLLER, PQCC52 PDF资料下载
参数资料
| 型号： | MC68HC08AS20CFN |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 18/96页 |
| 文件大小： | 3243K |
| 代理商： | MC68HC08AS20CFN |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页当前第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页
3
MC68HC05E0
MOTOROLA
3-3
CPU CORE AND INSTRUCTION SET
Half carry (H)
This bit is set during ADD and ADC operations to indicate that a carry occurred between bits 3 and 4.
Interrupt (I)
When this bit is set, all maskable interrupts are masked. If an interrupt occurs while this bit is set,
the interrupt is latched and remains pending until the interrupt bit is cleared.
Negative (N)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
negative.
Zero (Z)
When set, this bit indicates that the result of the last arithmetic, logical, or data manipulation was
zero.
Carry/borrow (C)
When set, this bit indicates that a carry or borrow out of the arithmetic logical unit (ALU) occurred
during the last arithmetic operation. This bit is also affected during bit test and branch instructions
and during shifts and rotates.
3.2
Instruction set
The MCU has a set of 62 basic instructions. They can be grouped into ve different types as
follows:
–
Register/memory
–
Read/modify/write
–
Branch
–
Bit manipulation
–
Control
The following paragraphs briey explain each type. All the instructions within a given type are
presented in individual tables.
This MCU uses all the instructions available in the M146805 CMOS family plus one more: the
unsigned multiply (MUL) instruction. This instruction allows unsigned multiplication of the contents
of the accumulator (A) and the index register (X). The high-order product is then stored in the
index register and the low-order product is stored in the accumulator. A detailed definition of the
MUL instruction is shown in Table 3-1.
25
相关PDF资料 |
PDF描述 |
|---|---|
| MC68HC08AZ48AVFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60FU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60FU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60MFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60VFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC08AZ0 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Advance Information |
| MC68HC08AZ0CFU | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Advance Information |
| MC68HC08AZ16 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC08AZ24 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC08AZ32 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Advance Information |
发布紧急采购，3分钟左右您将得到回复。