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| 型号： | MC68HC08GP8ACFB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 75/126页 |
| 文件大小： | 4243K |
| 代理商： | MC68HC08GP8ACFB |
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Clock Generator Module (CGM)
Data Sheet
MC68HC08GP8A
52
Clock Generator Module (CGM)
MOTOROLA
Software must wait a given time, tAL, after entering tracking mode before
selecting the PLL as the clock source to CGMOUT (BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
4.3.6 Programming the PLL
The following procedure shows how to program the PLL.
NOTE:
The round function in the following equations means that the real number should
be rounded to the nearest integer number.
1.
Choose the desired bus frequency, fBUSDES.
2.
Calculate the desired VCO frequency (four times the desired bus
frequency).
3.
Choose a practical PLL (crystal) reference frequency, fRCLK, and the
reference clock divider, R. Typically, the reference crystal is 32.768 kHz and
R = 1.
Frequency errors to the PLL are corrected at a rate of fRCLK/R. For stability
and lock time reduction, this rate must be as fast as possible. The VCO
frequency must be an integer multiple of this rate. The relationship between
the VCO frequency, fVCLK, and the reference frequency, fRCLK, is
P, the power of two multiplier, and N, the range multiplier, are integers.
In cases where desired bus frequency has some tolerance, choose fRCLK to
a value determined either by other module requirements (such as modules
which are clocked by CGMXCLK), cost requirements, or ideally, as high as
the specified range allows. See Section 20. Electrical Specifications.
Choose the reference divider, R = 1. After choosing N and P, the actual bus
frequency can be determined using equation in 2 above.
When the tolerance on the bus frequency is tight, choose fRCLK to an integer
divisor of fBUSDES, and R = 1. If fRCLK cannot meet this requirement, use the
following equation to solve for R with practical choices of fRCLK, and choose
the fRCLK that gives the lowest R.
f
VCLKDES
4f
BUSDES
×
=
f
VCLK
2
P
N
R
----------- f
RCLK
()
=
R
round R
MAX
f
VCLKDES
f
RCLK
--------------------------
integer
f
VCLKDES
f
RCLK
--------------------------
–
×
=
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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