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| 型号： | MC68HC08GP8ACFB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 78/126页 |
| 文件大小： | 4243K |
| 代理商： | MC68HC08GP8ACFB |
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Clock Generator Module (CGM)
Functional Description
MC68HC08GP8A
Data Sheet
MOTOROLA
Clock Generator Module (CGM)
55
4.3.7 Special Programming Exceptions
The programming method described in 4.3.6 Programming the PLL does not
account for three possible exceptions. A value of 0 for R, N, or L is meaningless
when used in the equations given. To account for these exceptions:
A 0 value for R or N is interpreted exactly the same as a value of 1.
A 0 value for L disables the PLL and prevents its selection as the source for
the base clock.
4.3.8 Base Clock Selector Circuit
This circuit is used to select either the crystal clock, CGMXCLK, or the VCO clock,
CGMVCLK, as the source of the base clock, CGMOUT. The two input clocks go
through a transition control circuit that waits up to three CGMXCLK cycles and
three CGMVCLK cycles to change from one clock source to the other. During this
time, CGMOUT is held in stasis. The output of the transition control circuit is then
divided by two to correct the duty cycle. Therefore, the bus clock frequency, which
is one-half of the base clock frequency, is one-fourth the frequency of the selected
clock (CGMXCLK or CGMVCLK).
The BCS bit in the PLL control register (PCTL) selects which clock drives
CGMOUT. The VCO clock cannot be selected as the base clock source if the PLL
is not turned on. The PLL cannot be turned off if the VCO clock is selected. The
PLL cannot be turned on or off simultaneously with the selection or deselection of
the VCO clock. The VCO clock also cannot be selected as the base clock source
if the factor L is programmed to a 0. This value would set up a condition
inconsistent with the operation of the PLL, so that the PLL would be disabled and
the crystal clock would be forced as the source of the base clock.
4.3.9 CGM External Connections
In its typical configuration, the CGM requires up to nine external components. Five
of these are for the crystal oscillator and two or four are for the PLL.
The crystal oscillator is normally connected in a Pierce oscillator configuration, as
shown in Figure 4-2. Figure 4-2 shows only the logical representation of the
internal components and may not represent actual circuitry. The oscillator
configuration uses five components:
Crystal, X1
Fixed capacitor, C1
Tuning capacitor, C2 (can also be a fixed capacitor)
Feedback resistor, RB
Series resistor, RS
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For More Information On This Product,
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