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参数资料
型号： MC68HC08GP8ACFB
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44
封装： PLASTIC, QFP-44
文件页数： 81/126页
文件大小： 4243K
代理商： MC68HC08GP8ACFB
Clock Generator Module (CGM)
Data Sheet
MC68HC08GP8A
58
Clock Generator Module (CGM)
MOTOROLA
4.4.8 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the
crystal (fXCLK) and comes directly from the crystal oscillator circuit. Figure 4-2
shows only the logical relation of CGMXCLK to OSC1 and OSC2 and may not
represent the actual circuitry. The duty cycle of CGMXCLK is unknown and may
depend on the crystal and other external factors. Also, the frequency and amplitude
of CGMXCLK can be unstable at startup.
4.4.9 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal goes to the SIM, which
generates the MCU clocks. CGMOUT is a 50 percent duty cycle clock running at
twice the bus frequency. CGMOUT is software programmable to be either the
oscillator output, CGMXCLK, divided by two or the VCO clock, CGMVCLK, divided
by two.
4.4.10 CGM CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.
4.5 CGM Registers
These registers control and monitor operation of the CGM:
PLL control register (PCTL)
(See 4.5.1 PLL Control Register.)
PLL bandwidth control register (PBWC)
(See 4.5.2 PLL Bandwidth Control Register.)
PLL multiplier select register high (PMSH)
(See 4.5.3 PLL Multiplier Select Register High.)
PLL multiplier select register low (PMSL)
(See 4.5.4 PLL Multiplier Select Register Low.)
PLL VCO range select register (PMRS)
(See 4.5.5 PLL VCO Range Select Register.)
PLL reference divider select register (PMDS)
(See 4.5.6 PLL Reference Divider Select Register.)
Figure 4-3 is a summary of the CGM registers.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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