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| 型号： | MC68HC08GP8ACFB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44 |
| 封装： | PLASTIC, QFP-44 |
| 文件页数： | 95/126页 |
| 文件大小： | 4243K |
| 代理商： | MC68HC08GP8ACFB |
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Computer Operating Properly (COP)
Data Sheet
MC68HC08GP8A
70
Computer Operating Properly (COP)
MOTOROLA
The COP counter is a free-running 6-bit counter preceded by a 12-bit prescaler
counter. If not cleared by software, the COP counter overflows and generates an
asynchronous reset after 218 –24 or 213 –24 CGMXCLK cycles, depending on the
state of the COP rate select bit, COPRS, in the mask option register. With a
213 –24 CGMXCLK cycle overflow option, a 32.768-kHz crystal gives a COP
timeout period of 250 ms. Writing any value to location $FFFF before an overflow
occurs prevents a COP reset by clearing the COP counter and stages 12 through
5 of the prescaler.
NOTE:
Service the COP immediately after reset and before entering or after exiting stop
mode to guarantee the maximum time before the first COP counter overflow.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the COP bit
in the reset status register (RSR).
In monitor mode, the COP is disabled if the RST pin or the IRQ is held at VTST.
During the break state, VTST on the RST pin disables the COP.
NOTE:
Place COP clearing instructions in the main program and not in an interrupt
subroutine. Such an interrupt subroutine could keep the COP from generating a
reset even while the main program is not working properly.
5.3 I/O Signals
The following paragraphs describe the signals shown in Figure 5-1.
5.3.1 CGMXCLK
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency is equal to
the crystal frequency.
5.3.2 STOP Instruction
The STOP instruction clears the COP prescaler.
5.3.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 5.4 COP Control
Register) clears the COP counter and clears bits 12 through 5 of the prescaler.
Reading the COP control register returns the low byte of the reset vector.
5.3.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096 CGMXCLK
cycles after power-up.
5.3.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
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