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OPERATING MODES AND ON-CHIP MEMORY

TECHNICAL DATA

4-1

SECTION 4

OPERATING MODES AND ON-CHIP MEMORY

This section contains information about the modes that define MC68HC11D3 operat-

ing conditions, and about the on-chip memory that allows the MCU to be configured

for various applications.

4.1 Operating Modes

The values of the mode select inputs MODB and MODA during reset determine the

operating mode. Single chip and expanded multiplexed are the normal modes. With

single-chip mode only on-board memory is available. Expanded multiplexed mode,

however, allows access to external memory. Each of these two normal modes is

paired with a special mode. Bootstrap, a variation of the single-chip mode, is a special

mode that executes a bootloader program in an internal bootstrap ROM. Test is a spe-

cial mode that allows privileged access to internal resources.

4.1.1 Single-Chip Mode

In single-chip mode, ports B and C are available for general-purpose parallel I/O. In

expanded multiplexed mode the MCU can access a 64 Kbyte address space. The total

address space includes the same on-chip memory addresses used for single-chip

mode plus external memory and peripheral devices.

4.1.2 Expanded Multiplexed Mode

Expanded memory access is achieved by providing multiplexed external data and ad-

dress buses on two of the M68HC11 ports; therefore only 18 pins are needed for an

8-bit data bus, a 16-bit address bus and two bus control lines. Port B is designated for

ADDR[15:8], while port C is multiplexed ADDR[7:0]/DATA[7:0]. The address, R/W,

and AS signals are active and valid for all bus cycles including accesses to internal

memory locations. Refer to Figure 4-1, which illustrates a recommended method of

demultiplexing low order addresses from data at port C.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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