参数资料
型号: MC68HC11ED0VP2
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 2 MHz, MICROCONTROLLER, PDIP40
封装: PLASTIC, DIP-40
文件页数: 29/108页
文件大小: 1672K
代理商: MC68HC11ED0VP2
Central Processor Unit (CPU)
CPU Registers
MC68HC11ED0 — Rev. 1.0
Technical Summary
Central Processor Unit (CPU)
Figure 3-2. Stacking Operations
When a subroutine is called by a jump-to-subroutine (JSR) or branch-to-
subroutine (BSR) instruction, the address of the instruction after the JSR
or BSR is automatically pushed onto the stack, least significant byte first.
When the subroutine is finished, a return-from-subroutine (RTS)
instruction is executed. The RTS pulls the previously stacked return
address from the stack and loads it into the program counter. Execution
then continues at this recovered return address.
SP–2
STACK
RTNH
SP–1
RTNL
SP
70
PC
MAIN PROGRAM
$9D = JSR
JSR, JUMP TO SUBROUTINE
dd
NEXT MAIN INSTR.
RTN
DIRECT
PC
MAIN PROGRAM
$AD = JSR
ff
NEXT MAIN INSTR.
RTN
INDEXED, X
PC
MAIN PROGRAM
$18 = PRE
ff
NEXT MAIN INSTR.
RTN
INDEXED, Y
$AD = JSR
PC
MAIN PROGRAM
$BD = PRE
ll
NEXT MAIN INSTR.
RTN
INDEXED, Y
hh
SP
STACK
CCR
SP+1
ACCB
SP+2
ACCA
SP+3
IXH
SP+4
IXL
SP+5
IYH
SP+6
IYL
SP+7
RTNH
SP+8
SP+9
70
RTNL
PC
INTERRUPT ROUTINE
$3B = RTI
SP–9
STACK
CCR
SP–8
ACCB
SP–7
ACCA
SP–6
IXH
SP–5
IXL
SP–4
IYH
SP–3
IYL
SP–2
RTNH
SP–1
SP
70
RTNL
PC
MAIN PROGRAM
$3F = SWI
PC
MAIN PROGRAM
$3E = WAI
SWI, SOFTWARE INTERRUPT
WAI, WAIT FOR INTERRUPT
RTI, RETURN FROM INTERRUPT
SP–2
STACK
RTNH
SP–1
RTNL
SP
70
PC
MAIN PROGRAM
$8D = BSR
PC
MAIN PROGRAM
$39 = RTS
BSR, BRANCH TO SUBROUTINE
RTS, RETURN
FROM SUBROUTINE
SP
STACK
RTNH
SP+1
RTNL
SP+2
70
LEGEND:
RTN = ADDRESS OF NEXT INSTRUCTION IN MAIN PROGRAM TO
BE EXECUTED UPON RETURN FROM SUBROUTINE
RTNH = MOST SIGNIFICANT BYTE OF RETURN ADDRESS
RTNL = LEAST SIGNIFICANT BYTE OF RETURN ADDRESS
= STACK POINTER POSITION AFTER OPERATION IS COMPLETE
dd = 8-BIT DIRECT ADDRESS ($0000–$00FF) (HIGH BYTE ASSUMED
TO BE $00)
ff = 8-BIT POSITIVE OFFSET $00 (0) TO $FF (255) IS ADDED TO INDEX
hh = HIGH-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
ll = LOW-ORDER BYTE OF 16-BIT EXTENDED ADDRESS
rr= SIGNED RELATIVE OFFSET $80 (–128) TO $7F (+127) (OFFSET
RELATIVE TO THE ADDRESS FOLLOWING THE MACHINE CODE
OFFSET BYTE)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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