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参数资料
| 型号： | MC68HC11FC0CFU5 |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Technical Summary 8-Bit Microcontroller |
| 中文描述： | 8-BIT, 6 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | QFP-64 |
| 文件页数： | 19/74页 |
| 文件大小： | 513K |
| 代理商： | MC68HC11FC0CFU5 |
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MOTOROLA
MC68HC11F1/FC0
26
MC68HC11FTS/D
5.2 Reset and Interrupt Registers
*Can be written only once in first 64 cycles out of reset in normal modes, or at any time in special modes.
Bits [7:6], [4:2]
Refer to 4.3 System Initialization Registers, page 23, and 11.3 A/D Registers, page 56.
IRQE — IRQ Select Edge Sensitive Only
0 = Low level recognition
1 = Falling edge recognition
Table 11 Interrupt and Reset Vector Assignments
Vector Address
Interrupt Source
CCR Mask
Local Mask
Flag Bit
FFC0, C1
to
FFD4, D5
Reserved
—
FFD6, D7
SCI Serial System
I Bit
SCI Transmit Complete
TCIE
TC
SCI Transmit Data Register Empty
TIE
TDRE
SCI Idle Line Detect
ILIE
IDLE
SCI Receiver Overrun
RIE
OR
SCI Receive Data Register Full
RIE
RDRF
FFD8, D9
SPI Serial Transfer Complete
I Bit
SPIE
SPIF
FFDA, DB
Pulse Accumulator Input Edge
I Bit
PAII
PAIF
FFDC, DD
Pulse Accumulator Overflow
I Bit
PAOVI
PAOVF
FFDE, DF
Timer Overflow
I Bit
TOI
TOF
FFE0, E1
Timer Input Capture 4/Output Compare 5
I Bit
I4/O5I
I4/O5F
FFE2, E3
Timer Output Compare 4
I Bit
OC4I
OC4F
FFE4, E5
Timer Output Compare 3
I Bit
OC3I
OC3F
FFE6, E7
Timer Output Compare 2
I Bit
OC2I
OC2F
FFE8, E9
Timer Output Compare 1
I Bit
OC1I
OC1F
FFEA, EB
Timer Input Capture 3
I Bit
IC3I
IC3F
FFEC, ED
Timer Input Capture 2
I Bit
IC2I
IC2F
FFEE, EF
Timer Input Capture 1
I Bit
IC1I
IC1F
FFF0, F1
Real-Time Interrupt
I Bit
RTII
RTIF
FFF2, F3
IRQ
I Bit
None
FFF4, F5
XIRQ Pin
X Bit
None
FFF6, F7
Software Interrupt
None
FFF8, F9
Illegal Opcode Trap
None
FFFA, FB
COP Failure
None
NOCOP
None
FFFC, FD
Clock Monitor Fail
None
CME
None
FFFE, FF
RESET
None
OPTION — System Configuration Options
$x039
Bit 7
6
5
4
3
2
1
Bit 0
ADPU
CSEL
IRQE*
DLY*
CME
FCME*
CR1*
CR0*
RESET:
0
1
0
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