参数资料
型号: MC68HC11FC0CFU5
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: Technical Summary 8-Bit Microcontroller
中文描述: 8-BIT, 6 MHz, MICROCONTROLLER, PQFP64
封装: QFP-64
文件页数: 29/74页
文件大小: 513K
代理商: MC68HC11FC0CFU5
MC68HC11F1/FC0
MOTOROLA
MC68HC11FTS/D
35
* Following reset in expanded and test modes, PG7/CSPRG is configured as a program chip select, forcing the pin
to be an output pin, even though the value of the DDG7 bit remains zero.
For DDRx bits, 0 = input and 1 = output.
The reset state of port B is mode dependent. In single-chip or bootstrap modes, port B pins are general-
purpose outputs. In expanded and test modes, port B pins are high-order address outputs and PORTB
is not in the memory map.
The reset state of port F is mode dependent. In single-chip or bootstrap modes, port F pins are general-
purpose outputs. In expanded and test modes, port F pins are low-order address outputs and PORTF
is not in the memory map.
The reset state of port C is mode dependent. In single-chip and bootstrap modes, port C pins are high-
impedance inputs. In expanded or test modes, port C pins are data bus inputs/outputs and PORTC is
not in the memory map. The R/W signal is used to control the direction of data transfers.
For DDRx bits, 0 = input and 1 = output.
DDRG — Port G Data Direction Register
$x003
Bit 7
6
5
4
3
2
1
Bit 0
DDG7*
DDG6
DDG5
DDG4
DDG3
DDG2
DDG1
DDG0
RESET:
0
PORTB — Port B Data Register
$x004
Bit 7
6
5
4
3
2
1
Bit 0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
0
Alternate
Function:
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
PORTF — Port F Data Register
$x005
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
RESET:
00000000
Alternate
Function:
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
PORTC — Port C Data Register
$x006
Bit 7
654321
Bit 0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
RESET:
IIIIIIII
Alternate
Function:
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
DDRC — Port C Data Direction Register
$x007
Bit 7
654321
Bit 0
DDC7
DDC6
DDC5
DDC4
DDC3
DDC2
DDC1
DDC0
RESET:
00000000
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