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参数资料
型号： MC68HC705E6MFB
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封装： PLASTIC, QFP-44
文件页数： 6/140页
文件大小： 1584K
代理商： MC68HC705E6MFB
Central Processing Unit
Instruction Set Summary
MC68HC05E6 — Rev. 1.0
Central Processing Unit
19-cpu
TST
opr
TSTA
TSTX
TST
opr,X
TST ,X
Test Memory Byte for Negative or Zero
(M) – $00
— — ¤¤ —
DIR
INH
IX1
IX
3D
4D
5D
6D
7D
dd
ff
4
3
5
4
TXA
Transfer Index Register to Accumulator
A
← (X)
—————
INH
9F
2
WAIT
Stop CPU Clock and Enable Interrupts
—
0
— — —
INH
8F
2
A Accumulator
opr
Operand (one or two bytes)
C Carry/borrow agPC
Program counter
CCRCondition code registerPCH
Program counter high byte
ddDirect address of operandPCL
Program counter low byte
dd rrDirect address of operand and relative offset of branch instructionREL
Relative addressing mode
DIRDirect addressing mode
rel
Relative program counter offset byte
ee ffHigh and low bytes of offset in indexed, 16-bit offset addressingrr
Relative program counter offset byte
EXTExtended addressing modeSP
Stack pointer
ff Offset byte in indexed, 8-bit offset addressingX
Index register
H Half-carry agZ
Zero ag
hh llHigh and low bytes of operand address in extended addressing#
Immediate value
I Interrupt mask
∧
Logical AND
ii Immediate operand byte
∨
Logical OR
IMMImmediate addressing mode
⊕
Logical EXCLUSIVE OR
INHInherent addressing mode( )
Contents of
IXIndexed, no offset addressing mode–( )
Negation (two’s complement)
IX1Indexed, 8-bit offset addressing mode
←
Loaded with
IX2Indexed, 16-bit offset addressing mode?
If
MMemory location:
Concatenated with
N Negative ag¤
Set or cleared
n Any bit—
Not affected
Table 17 Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
Address
Mode
Opcode
Operand
Cycles
H I NZC
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相关代理商/技术参数
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