参数资料
型号: MC68HC705JB2P
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20
封装: PLASTIC, DIP-20
文件页数: 104/128页
文件大小: 2493K
代理商: MC68HC705JB2P
August 28, 1998
GENERAL RELEASE SPECIFICATION
UNIVERSAL SERIAL BUS MODULE
REV 1.1
10-9
After a reset is removed, the device will be in the attached, but not yet addressed
or congured state (refer to Section 9.1 of the USB specication). The device must
be able to accept a device address via a SET_ADDRESS command (refer to
section 9.4 of the USB specication) no later than 10 ms after the reset is
removed.
Reset can wake a device from the suspended mode. A device may take up to
10ms to wake up from the suspended state.
10.2.3 Suspend
The MC68HC705JB2 supports suspend mode for low power. Suspend mode
should be entered when the USB data lines are in the idle state for more than 3.0
ms. Entry into Suspend mode is controlled by the SUSPND bit in the USB
Interrupt Register. Any low speed bus activity should keep the device out of the
suspend state. Low speed devices are kept awake by periodic low speed EOP
signals from the host. This is referred to as Low speed keep alive (refer to Section
11.2.5.1 of the USB specication).
Firmware should monitor the EOPF ag and enter suspend mode by setting the
SUSPND bit if an EOP is not detected for 3 ms.
Per the USB specication, the MC68HC705JB2 is required to draw less than
500
A from the V
DD supply when in the suspend state. This includes the current
supplied by the voltage regulator to the 15 K
to ground termination resistors
placed at the host end of the USB bus. This low current requirement means that
rmware is responsible for entering STOP mode once the USB module has been
placed in the suspend state.
10.2.4 Resume After Suspend
The MC68HC705JB2 can be activated from the suspend state by normal bus
activity, a USB reset signal, or by a forced resume driven from the
MC68HC705JB2.
10.2.4.1 Host Initiated Resume
The host signals resume by initiating resume signalling (“K” state) for at least 20
ms followed by a standard low speed EOP signal. This 20 ms ensures that all
devices in the USB network are awakened.
After resuming the bus, the host must begin sending bus trafc within 3 ms to
prevent the device from re-entering suspend mode.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相关PDF资料
PDF描述
MC68HC705JB4P 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28
MC68HC705K1CDW 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO16
MC68HC705K1CP 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP16
MC68HC705K1S 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, CDIP16
MC68HC705K1DW 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO16
相关代理商/技术参数
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