参数资料
型号: MC68HC705T16B
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封装: PLASTIC, SDIP-56
文件页数: 106/128页
文件大小: 734K
代理商: MC68HC705T16B
MC68HC05T16
MOTOROLA
9-9
ON-SCREEN DISPLAY
9
Figure 9-4 and Figure 9-5 illustrate the timing signals of R, G, B, I, FBKG, and HTONE as a
function of control bits BGEN, RiBE, and FBKGCi, using the 5th line (line 4) of a 12x16 dot matrix
as an example. All output signals assume positive polarity.
Figure 9-4 illustrates the timing of output signals for characters with and without bordering effect.
Figure 9-5 illustrates the output signal timing for characters with background enabled, yet with
opposite FBKGCi bit setting. Note that both RiBE and FBKGCi are row features. Hence, the two
adjacent dot matrices in both gures are drawn for demonstration purposes only, they do not imply
that users can congure OSD display in such a manner that one character has FBKGCi bit set and
the next character in the same row has FBKGCi bit cleared. Note that ‘HTONE’ has exactly the
same waveform as ‘Background R,G,B, or I’. Output signal timing diagram similar to Figure 9-5 for
the case where character bordering is enabled can be derived in very similar fashion. The only
difference is that ‘FBKG’ will be on and ‘HTONE’ will be off where a bordering dot exists. Other
output signal timings remain the same.
RiVP6 to RiVP0 - Row i Vertical Position
For single scan mode:
Vertical position = RiVPx setting x 4
For double scan mode:
Vertical position = RiVPx setting x 4 x 2
Each RiVP6-RiVP0 step shifts the vertical position of row i by 4 horizontal display lines. For single
scan mode, the shift is (RiVP6-RiVP0)x4 horizontal lines. For double scan mode, the shift is
((RiVP6-RiVP0)x4) x 2 horizontal lines. The calculation of shift is a function of scan mode, not
character size selection. Hence, care should be taken when choosing vertical position for a
particular row that locates after a row which has character size other than the basic 12x16 or
16x16 setting. For example, assuming single scan mode, if row X has 4Hx4V character size and
vertical position of $40 while row Y has basic character size of 1Hx1V and vertical position of $48,
then row X will be displayed from the 256th (64x4) line to the 287th line, which covers only the rst
32 lines of the supposed 64-line row X display, and row Y will be displayed from the 288th (72x4)
line to 303th line without any missing lines.
The reference point of shift is the leading edge of vertical yback input signal, VFLBK. As a result
of this vertical start position granularity, there are a total of 262.5/4 row positions in a full
screen.
In Figure 9-6(a), row (i+1) and row i partially overlaps. Since the vertical position of row (i+1) is
lower than row i, row (i+1) will be partially covered by row i. New symbols may be generated when
rows are partially overlapped.
In Figure 9-6(b), row (j+1) is completely covered by row j. As result, only row j is visible.
Note that in cases where the character size of the blocked row is bigger than that of the blocking
row, once the blocked row has been blocked, it will never be displayed again even after the
blocking row display has been terminated. For example, assume the character size of row (i+1) is
4Hx4V and that of row i is 1Hx1V, and the difference in vertical position between them is 4
horizontal lines only. After the rst four lines of row (i+1) have been displayed, row i display will
commence and continue for the next sixteen lines, blocking off row (i+1) display for these sixteen
lines. After row i display has been terminated, there are still (64-4-16)=44 lines of row (i+1) display
TPG
77
相关PDF资料
PDF描述
MC68HC05T16B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705V8CFU 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP64
MC68HC705V8B 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705V8FN 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
MC68HC705V8CFN 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
相关代理商/技术参数
参数描述
MC68HC706P6ACDW 制造商:Motorola Inc 功能描述:
MC68HC708MP16CFU 制造商:MAJOR 功能描述:
MC68HC711D3CFBE2 制造商:Freescale Semiconductor 功能描述:
MC68HC711D3CFN2 功能描述:IC MCU 2MHZ 4K OTP 44-PLCC RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器, 系列:HC11 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C,IrDA,LIN,SPI,UART/USART 外围设备:DMA,PDR,POR,PVD,PWM,温度传感器,WDT 输入/输出数:26 程序存储器容量:64KB(64K x 8) 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN,36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND
MC68HC711D3CFNE2 功能描述:8位微控制器 -MCU 8B OTP 192RAM 2 MHZ RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT