
Timer Interface Module (TIM2)
Functional Description
MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A
Data Sheet
MOTOROLA
Timer Interface Module (TIM2)
277
Reset does not affect the contents of the input capture channel (T2CHxH:T2CHxL)
registers.
18.3.3 Output Compare
With the output compare function, the TIM2 can generate a periodic pulse with a
programmable polarity, duration, and frequency. When the counter reaches the
value in the registers of an output compare channel, the TIM2 can set, clear, or
toggle the channel pin. Output compares can generate TIM2 CPU interrupt
requests.
18.3.3.1 Unbuffered Output Compare
Any output compare channel can generate unbuffered output compare pulses as
changing the output compare value requires writing the new value over the old
value currently in the TIM2 channel registers.
An unsynchronized write to the TIM2 channel registers to change an output
compare value could cause incorrect operation for up to two counter overflow
periods. For example, writing a new value before the counter reaches the old value
but after the counter reaches the new value prevents any compare during that
counter overflow period. Also, using a TIM2 overflow interrupt routine to write a
new, smaller output compare value may cause the compare to be missed. The
TIM2 may pass the new value before it is written.
Use the following methods to synchronize unbuffered changes in the output
compare value on channel x:
When changing to a smaller value, enable channel x output compare
interrupts and write the new value in the output compare interrupt routine.
The output compare interrupt occurs at the end of the current output
compare pulse. The interrupt routine has until the end of the counter
overflow period to write the new value.
When changing to a larger output compare value, enable TIM2 overflow
interrupts and write the new value in the TIM2 overflow interrupt routine. The
TIM2 overflow interrupt occurs at the end of the current counter overflow
period. Writing a larger value in an output compare interrupt routine (at the
end of the current pulse) could cause two output compares to occur in the
same counter overflow period.