
Electrical Specifications
MC68HC908GR8 MC68HC908GR4 Data Sheet, Rev. 7
268
Freescale Semiconductor
23.15 Timer Interface Module Characteristics
23.16 Memory Characteristics
Characteristic
Symbol
Min
Max
Unit
Input capture pulse width
tTIH, tTIL
2—
tcyc
Timer input capture period
tTLTL
See Note(1)
1. The minimum period is the number of cycles it takes to execute the interrupt service routine plus 1 tcyc.
—
tcyc
Characteristic
Symbol
Min
Typ
Max
Unit
RAM data retention voltage
VRDR
1.3
—
V
FLASH program bus clock frequency
—
1
—
MHz
FLASH read bus clock frequency
fRead
(1)
1. fRead is defined as the frequency range for which the FLASH memory can be read.
32k
—
8.4M
Hz
FLASH page erase time
Limited endurance (<1 K cycles)
Maximum endurance (> 1 K cycles)
tErase
0.9
3.6
1
4
1.1
5.5
ms
FLASH mass erase time
tMErase
4—
—
ms
FLASH PGM/ERASE to HVEN set up time
tnvs
10
—
μs
FLASH high-voltage hold time
tnvh
5—
—
μs
FLASH high-voltage hold time (mass erase)
tnvhl
100
—
μs
FLASH program hold time
tpgs
5—
—
μs
FLASH program time
tPROG
30
—
40
μs
FLASH return to read time
trcv
(2)
2. trcv is defined as the time it needs before the FLASH can be read after turning off the high voltage charge pump, by clearing
HVEN to 0.
1—
—
μs
FLASH cumulative program HV period
tHV
(3)
3. tHV is defined as the cumulative high voltage programming time to the same row before next erase.
tHV must satisfy this condition: tnvs + tnvh + tpgs + (tPROG × 64) ≤ tHV max.
——
4
ms
FLASH endurance(4)
4. Typical endurance was evaluated for this product family. For additional information on how Freescale defines typical
Endurance, please refer to Engineering Bulletin EB619.
—
10k
100k
—
Cycles
FLASH data retention time(5)
5. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618.
—
15
100
—
Years