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| 型号： | MC9328MX1DVM20 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 57/100页 |
| 文件大小： | 0K |
| 描述： | IC MCU I.MX 200MHZ 256-MAPBGA |
| 标准包装： | 152 |
| 系列： | i.MX1 |
| 核心处理器： | ARM9 |
| 芯体尺寸： | 32-位 |
| 速度： | 200MHz |
| 连通性： | EBI/EMI，I²C，MMC，智能卡，SPI，SSI，UART/USART，USB |
| 外围设备： | DMA，I²S，LCD，POR，PWM，WDT |
| 输入/输出数： | 110 |
| 程序存储器类型： | ROMless |
| 电压 - 电源 (Vcc/Vdd)： | 1.7 V ~ 3.3 V |
| 振荡器型： | 外部 |
| 工作温度： | -30°C ~ 70°C |
| 封装/外壳： | 256-MAPBGA |
| 包装： | 托盘 |
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Signals and Connections
MC9328MX1 Technical Data, Rev. 7
6
Freescale Semiconductor
DMA
DMA_REQ
DMA Request—external DMA request signal. Multiplexed with SPI1_SPI_RDY.
BIG_ENDIAN
Big Endian—Input signal that determines the configuration of the external chip-select space. If it is
driven logic-high at reset, the external chip-select space will be configured to big endian. If it is driven
logic-low at reset, the external chip-select space will be configured to little endian. This input must not
change state after power-on reset negates or during chip operation.
ETM
ETMTRACESYNC
ETM sync signal which is multiplexed with A24. ETMTRACESYNC is selected in ETM mode.
ETMTRACECLK
ETM clock signal which is multiplexed with A23. ETMTRACECLK is selected in ETM mode.
ETMPIPESTAT [2:0]
ETM status signals which are multiplexed with A [22:20]. ETMPIPESTAT [2:0] are selected in ETM
mode.
ETMTRACEPKT [7:0] ETM packet signals which are multiplexed with ECB, LBA, BCLK (burst clock), PA17, A [19:16].
ETMTRACEPKT [7:0] are selected in ETM mode.
CMOS Sensor Interface
CSI_D [7:0]
Sensor port data
CSI_MCLK
Sensor port master clock
CSI_VSYNC
Sensor port vertical sync
CSI_HSYNC
Sensor port horizontal sync
CSI_PIXCLK
Sensor port data latch clock
LCD Controller
LD [15:0]
LCD Data Bus—All LCD signals are driven low after reset and when LCD is off.
FLM/VSYNC
Frame Sync or Vsync—This signal also serves as the clock signal output for the gate
driver (dedicated signal SPS for Sharp panel HR-TFT).
LP/HSYNC
Line pulse or H sync
LSCLK
Shift clock
ACD/OE
Alternate crystal direction/output enable.
CONTRAST
This signal is used to control the LCD bias voltage as contrast control.
SPL_SPR
Program horizontal scan direction (Sharp panel dedicated signal).
PS
Control signal output for source driver (Sharp panel dedicated signal).
CLS
Start signal output for gate driver. This signal is an inverted version of PS (Sharp panel dedicated
signal).
REV
Signal for common electrode driving signal preparation (Sharp panel dedicated signal).
SIM
SIM_CLK
SIM Clock
SIM_RST
SIM Reset
SIM_RX
Receive Data
Table 2. i.MX1 Signal Descriptions (Continued)
Signal Name
Function/Notes
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC9328MX1DVM20R2 | 功能描述:处理器 - 专门应用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432 |
| MC9328MX1P/D | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MX1S | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MX1SRM/D | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MX1VH20 | 功能描述:IC MCU I.MX 200MHZ 256-MAPBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:i.MX1 标准包装:250 系列:56F8xxx 核心处理器:56800E 芯体尺寸:16-位 速度:60MHz 连通性:CAN，SCI，SPI 外围设备:POR，PWM，温度传感器，WDT 输入/输出数:21 程序存储器容量:40KB（20K x 16） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:6K x 16 电压 - 电源 (Vcc/Vdd):2.25 V ~ 3.6 V 数据转换器:A/D 6x12b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:48-LQFP 包装:托盘 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
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