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参数资料
型号： MCF53017CMJ240J
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： MICROPROCESSOR, PBGA256
封装： 17 X 17 MM, ROHS COMPLIANT, PLASTIC, MAPBGA-256
文件页数： 17/62页
文件大小： 2365K
代理商： MCF53017CMJ240J
MCF5301x Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Preliminary Electrical Characteristics
Freescale Semiconductor
24
5.5
Oscillator and PLL Electrical Characteristics
Table 11. PLL Electrical Characteristics
Num
Characteristic
Symbol
Min.
Value
Max.
Value
Unit
1
PLL Reference Frequency Range
Crystal reference
External reference
fref_crystal
fref_ext
14
251
481
1
The maximum allowable input clock frequency when booting with the PLL enabled is 24MHz. For higher input clock
frequencies the processor must boot in LIMP mode to avoid violating the maximum allowable CPU frequency.
MHz
2
Core frequency
CLKOUT Frequency2
2
All internal registers retain data at 0 Hz.
fsys
fsys/3
488 x 10-6
163 x 10-6
240
80
MHz
3
Crystal Start-up Time3, 4
3
This parameter is guaranteed by characterization before qualification rather than 100% tested.
4
Proper PC board layout procedures must be followed to achieve specifications.
tcst
—10
ms
4
EXTAL Input High Voltage
Crystal Mode5
All other modes (External, Limp)
5
This parameter is guaranteed by design rather than 100% tested.
VIHEXT
VXTAL + 0.4
EVDD/2 + 0.4
—
V
5
EXTAL Input Low Voltage
Crystal Mode5
All other modes (External, Limp)
VILEXT
—
VXTAL – 0.4
EVDD/2 – 0.4
V
7
PLL Lock Time 3, 6
6
This specification is the PLL lock time only and does not include oscillator start-up time..
tlpll
—
750
us
8
Duty Cycle of reference 3
tdc
40
60
%
9
XTAL Current
IXTAL
13
mA
10
Total on-chip stray capacitance on XTAL
CS_XTAL
—1.5
pF
11
Total on-chip stray capacitance on EXTAL
CS_EXTAL
—1.5
pF
12
Crystal capacitive load
CL
—See crystal
spec
13
Discrete load capacitance for XTAL
CL_XTAL
—2
× C
L –
CS_XTAL –
CPCB_XTAL
7
CPCB_EXTAL and CPCB_XTAL are the measured PCB stray capacitances on EXTAL and XTAL, respectively.
pF
14
Discrete load capacitance for EXTAL
CL_EXTAL
—2
× C
L –
CS_EXTAL –
CPCB_EXTAL
7
pF
17
CLKOUT Period Jitter, 3, 4, 7, 8, 9 Measured at fSYS Max
Peak-to-peak Jitter (Clock edge to clock edge)
Long Term Jitter
Cjitter
—
TBD
% fsys/3
18
Frequency Modulation Range Limit 3, 10, 11
(fsysMax must not be exceeded)
Cmod
0.8
2.2
%fsys/3
19
VCO Frequency. fvco = (fref × PFD)/4
fvco
200
667
MHz
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