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| 型号： | MCP14E3T-E/SN |
| 厂商： | Microchip Technology |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DVR 4.0A DUAL 8SOIC |
| 标准包装： | 3,300 |
| 配置： | 低端 |
| 输入类型： | 反相 |
| 延迟时间： | 46ns |
| 电流 - 峰： | 4A |
| 配置数： | 2 |
| 输出数： | 2 |
| 电源电压： | 4.5 V ~ 18 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOICN |
| 包装： | 带卷 (TR) |
| 其它名称： | MCP14E3T-E/SNTR |
MCP14E3/MCP14E4/MCP14E5
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 .
TABLE 3-1:
PIN FUNCTION TABLE
8-Pin
PDIP, SOIC
1
2
3
4
5
6
7
8
—
8-Pin
6x5 DFN
1
2
3
4
5
6
7
8
PAD
Symbol
ENB_A
IN A
GND
IN B
OUT B
V DD
OUT A
ENB_B
NC
Output A Enable
Input A
Ground
Input B
Output B
Supply Input
Output A
Output B Enable
Exposed Metal Pad
Description
Note:
Duplicate pins must be connected for proper operation.
3.1
Control Inputs A and B
3.5
Enable A (ENB_A)
The MOSFET driver inputs are a high-impedance TTL/
CMOS compatible input. The inputs also have hystere-
sis between the high and low input levels, allowing
them to be driven from slow rising and falling signals
and to provide noise immunity.
3.2 Outputs A and B
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 4.0A of peak current
(V DD = 18V). The low output impedance ensures the
gate of the MOSFET will stay in the intended state even
during large transients. These outputs also have a
reverse latch-up rating of 1.5A.
3.3 Supply Input (V DD )
V DD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-imped-
ance path for the peak currents that are to be provided
to the load.
The ENB_A pin is the enable control for Output A. This
enable pin is internally pulled up to V DD for active high
operation and can be left floating for standard
operation. When the ENB_A pin is pulled below the
enable pin Low Level Input Voltage (V EN_L ), Output A
will be in the off state regardless of the input pin state.
3.6 Enable B (ENB_B)
The ENB_B pin is the enable control for Output B. This
enable pin is internally pulled up to V DD for active high
operation and can be left floating for standard
operation. When the ENB_B pin is pulled below the
enable pin Low-Level Input Voltage (V EN_L ), Output B
will be in the off state regardless of the input pin state.
3.7 DFN Exposed Pad
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
3.4
Ground (GND)
Ground is the device return pin. The ground pin(s)
should have a low impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
? 2008 Microchip Technology Inc.
DS22062B-page 11
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