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| 型号： | MCP2515T-I/ML |
| 厂商： | Microchip Technology |
| 文件页数： | 61/88页 |
| 文件大小： | 0K |
| 描述： | IC CAN CTLR W/SPI 2.0B 20-QFN |
| 标准包装： | 1 |
| 控制器类型： | CAN 接口 |
| 接口： | SPI 串行 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电流 - 电源： | 10mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
| 包装： | 标准包装 |
| 其它名称： | MCP2515T-I/MLDKR |
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MCP2515
DS21801F-page 64
2010 Microchip Technology Inc.
Each status bit returned in this command may also be
read by using the standard read command with the
appropriate register address.
12.9
RX Status Instruction
The RX Status instruction (Figure 12-9) is used to
quickly determine which filter matched the message
and message type (standard, extended, remote). After
the command byte is sent, the controller will return
8 bits of data that contain the status data. If more clocks
are sent after the 8 bits are transmitted, the controller
will continue to output the same status bits as long as
the CS pin stays low and clocks are provided.
12.10 Bit Modify Instruction
The Bit Modify instruction provides a means for setting
or clearing individual bits in specific status and control
registers. This command is not available for all
registers. See Section 11.0 “Register Map” to
determine which registers allow the use of this
command.
The part is selected by lowering the CS pin and the Bit
Modify command byte is then sent to the MCP2515.
The command is followed by the address of the
register, the mask byte and finally the data byte.
The mask byte determines which bits in the register will
be allowed to change. A ‘1’ in the mask byte will allow
a bit in the register to change, while a ‘0’ will not.
The data byte determines what value the modified bits
in the register will be changed to. A ‘1’ in the data byte
will set the bit and a ‘0’ will clear the bit, provided that
the mask for that bit is set to a ‘1’ (see Figure 12-7).
FIGURE 12-1:
BIT MODIFY
TABLE 12-1:
SPI INSTRUCTION SET
Note:
Executing the Bit Modify command on
registers that are not bit-modifiable will
force the mask to FFh. This will allow byte-
writes to the registers, not bit modify.
Mask byte
Data byte
Previous
Register
Contents
Resulting
Register
Contents
00 1
1
11
00
XX 1
1
00
XX
01 0
1
10
00
01 1
1
00
Instruction Name
Instruction Format
Description
RESET
1100 0000
Resets internal registers to default state, set Configuration mode.
READ
0000 0011
Read data from register beginning at selected address.
Read RX Buffer
1001 0nm0
When reading a receive buffer, reduces the overhead of a normal
read command by placing the address pointer at one of four
locations, as indicated by ‘n,m’. Note: The associated RX flag bit
(CANINTF.RXnIF) will be cleared after bringing CS high.
WRITE
0000 0010
Write data to register beginning at selected address.
Load TX Buffer
0100 0abc
When loading a transmit buffer, reduces the overhead of a normal
Write command by placing the address pointer at one of six
locations as indicated by ‘a,b,c’.
RTS
(Message
Request-To-Send)
1000 0nnn
Instructs controller to begin message transmission sequence for
any of the transmit buffers.
Read Status
1010 0000
Quick polling command that reads several status bits for transmit
and receive functions.
RX Status
1011 0000
Quick polling command that indicates filter match and message
type (standard, extended and/or remote) of received message.
Bit Modify
0000 0101
Allows the user to set or clear individual bits in a particular
register. Note: Not all registers can be bit-modified with this
command. Executing this command on registers that are not bit-
modifiable will force the mask to FFh. See the register map in
Section 11.0 “Register Map” for a list of the registers that apply.
1000 0nnn
Request-to-send for TXBO
Request-to-send for TXB1
Request-to-send for TXB2
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