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参数资料
| 型号： | MCW68332A |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, MICROCONTROLLER, UUC |
| 封装： | WAFER |
| 文件页数： | 27/111页 |
| 文件大小： | 650K |
| 代理商： | MCW68332A |
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MOTOROLA
MC68332
22
MC68332TS/D
3.2.7 Periodic Interrupt Timer
The periodic interrupt timer (PIT) generates interrupts of specified priorities at specified intervals. Timing
for the PIT is provided by a programmable prescaler driven by the system clock.
This register contains information concerning periodic interrupt priority and vectoring. Bits [10:0] can be
read or written at any time. Bits [15:11] are unimplemented and always return zero.
PIRQL[2:0] — Periodic Interrupt Request Level
The following table shows what interrupt request level is asserted when a periodic interrupt is generat-
ed. If a PIT interrupt and an external IRQ signal of the same priority occur simultaneously, the PIT in-
terrupt is serviced first. The periodic timer continues to run when the interrupt is disabled.
PIV[7:0] — Periodic Interrupt Vector
The bits of this field contain the vector generated in response to an interrupt from the periodic timer.
When the SIM responds, the periodic interrupt vector is placed on the bus.
The PITR contains the count value for the periodic timer. A zero value turns off the periodic timer. This
register can be read or written at any time.
PTP — Periodic Timer Prescaler Control
0 = Periodic timer clock not prescaled
1 = Periodic timer clock prescaled by a value of 512
The reset state of PTP is the complement of the state of the MODCLK signal during reset.
PITM[7:0] — Periodic Interrupt Timing Modulus Field
This is an 8-bit timing modulus. The period of the timer can be calculated as follows:
PIT Period = [(PITM)(Prescaler)(4)]/EXTAL
where
PIT Period = Periodic interrupt timer period
PITM = Periodic interrupt timer register modulus (PITR[7:0])
EXTAL Frequency = Crystal frequency
Prescale = 512 or 1 depending on the state of the PTP bit in the PITR
PICR — Periodic Interrupt Control Register
$YFFA22
15
14
13
12
11
10
8
7
0
PIRQL
PIV
RESET:
0
1
PIRQL
Interrupt Request Level
000
Periodic Interrupt Disabled
001
Interrupt Request Level 1
010
Interrupt Request Level 2
011
Interrupt Request Level 3
100
Interrupt Request Level 4
101
Interrupt Request Level 5
110
Interrupt Request Level 6
111
Interrupt Request Level 7
PITR —Periodic Interrupt Timer Register
$YFFA24
15
14
13
12
11
10
9
8
7
0
PTP
PITM
RESET:
0
MODCLK
0
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