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| 型号： | MCZ33887EK |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 33/37页 |
| 文件大小： | 0K |
| 描述： | IC H-BRIDGE 5V CURR FDBK 54-SOIC |
| 标准包装： | 26 |
| 类型： | 半桥 |
| 输入类型： | 非反相 |
| 输出数： | 2 |
| 导通状态电阻： | 120 毫欧 |
| 电流 - 输出 / 通道： | 5A |
| 电流 - 峰值输出： | 6.5A |
| 电源电压： | 5 V ~ 28 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 54-SSOP（0.295"，7.50mm 宽）裸露焊盘 |
| 供应商设备封装： | 54-SOICW-EP |
| 包装： | 管件 |
| 产品目录页面： | 808 (CN2011-ZH PDF) |
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ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
ADDITIONAL DOCUMENTATION
33887HSOP
THERMAL ADDENDUM (REV 2.0)
Introduction
This thermal addendum is provided as a supplement to the MC33887 technical
data sheet. The addendum provides thermal performance information that may
be critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the data sheet.
Packaging and Thermal Considerations
The MC33887 is offered in a 20 pin HSOP exposed pad, single die package.
There is a single heat source (P), a single junction temperature (T J ), and thermal
resistance (R θ JA ).
20-PIN
HSOP-EP
VW SUFFIX
98ASH70273A
20-PIN HSOP-EP
T J
=
R θ JA
.
P
The stated values are solely for a thermal performance comparison of one
package to another in a standardized environment. This methodology is not
meant to and will not predict the performance of a package in an application-
specific environment. Stated values were obtained by measurement and
simulation according to the standards listed below.
Standards
Note For package dimensions, refer to
the 33887 device data sheet.
Table 7.
Thermal Performance Comparison
Thermal Resistance
[ ° C/W]
20
1.0
1.0
6.0
0.2
0.2
NOTES:
R θ JA (1) , (4)
R θ JC (5)
52
1.0
* All measurements
are in millimeters
Soldermast
openings
1.Per JEDEC JESD51-2 at natural convection, still air condition.
2.2s2p thermal test board per JEDEC JESD51-5 and JESD51-7.
3.Per JEDEC JESD51-8, with the board temperature on the center
trace near the center lead.
4.Single layer thermal test board per JEDEC JESD51-3 and
20 Terminal HSOP-EP
1.27 mm Pitch
16.0 mm x 11.0 mm Body
12.2 mm x 6.9 mm Exposed Pad
Thermal vias
connected to top
buried plane
JESD51-5.
5.Thermal resistance between the die junction and the exposed
Figure 25. Thermal Land Pattern for Direct Thermal
Attachment According to JESD51-5
pad surface; cold plate attached to the package bottom side,
remaining surfaces insulated
33887
Analog Integrated Circuit Device Data
Freescale Semiconductor
33
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| MCZ33889BEG | 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER |
| MCZ33889BEG/R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:System Basis Chip with Low Speed Fault Tolerant CAN Interface |
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