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参数资料
| 型号： | MD5764802 |
| 厂商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 8M×8 Dynamic RAM(8M×8动态RAM) |
| 中文描述： | 8米× 8动态RAM（8米× 8动态内存） |
| 文件页数： | 10/45页 |
| 文件大小： | 613K |
| 代理商： | MD5764802 |
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Semiconductor
MSM5716C50/MSM5718C50/MD5764802
10/45
REQ PACKET (ADDRESS TRANSFER)
An REQ packet initiates a transaction by transferring the address and command information to the
RDRAM. Figure 6 shows the format of the REQ packet. Note that each RDRAM wire carries eight
bits of information in each t
PACKET
. This is the time required to transfer an octbyte of data and is the
natural granularity with which to illustrate timing relationships. The clock that is actually used by
the RDRAM has a period of t
CYCLE
, with information transferred on each clock edge. t
PACKET
is four
times t
CYCLE
.
In the REQ packet, the bits which are gray are reserved, and should be driven with a zero. In
particular, the bits in t
CYCLE
t
6
and t
7
are needed for bus-turn-around during read transactions.
A35..A3:
The address field A35..A3 consumes the greatest number of bits. These are allocated to
device, bank, row, and column addressing according to Table 3:
Table 3 A35..A3 Address Fields
OP5..OP0:
The command field OP5..OP0 specifies the type of transaction that is to be performed,
according to Table 4. The OP0 bit selects a read or write transaction, the OP1 bit selects a memory or
register space access, and OP5..OP2 select command options. These command options include B in
OP2 (see byte masking on page 22). D in OP3 for selecting broadcast operations (see refresh on page
35), and b1, b0 in OP5, OP4 (see bit masking on page 23).
ACTV:
This bit specifies activation or precharge/activation of a bank at the beginning of a
transaction, and is designated by prepending “ACTV/” or “PRE/ACTV/” to the command.
AUTO:
This bit specifies auto-precharge of a bank at the end of the transaction, and is designated
by appending “A” to the command.
START:
This bit is always set to a one and indicates the beginning of a request to the RDRAM.
REGSEL:
This bit is used for accessing registers.
PEND2...PEND0:
This field is set to “000” for noninterleaved transactions, and to a nonzero value
for interleaved transactions. This is the number of previous STRB and TERM packets the RDRAM
is to skip. Refer to the Concurrent RDRAM Design Guidefor further details.
M7..M0:
This field is used to perform byte masking of the first data octbyte DINa for all memory write
transactions (OP1, OP0 = 01). Refer to byte masking on page 22.
Field
COL
ROW
BNK
DEV
16M/18M (2KB Page)
A10..A3
A19..A11
A20
A35..A21
64M (2KB Page)
A10..A3
A20..A11
A22, A21
A35..A23
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相关代理商/技术参数 |
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|---|---|
| MD-577G/2 | 制造商:Oshino Lamps 功能描述: |
| MD-577G/3 | 制造商:Oshino Lamps 功能描述: |
| MD-577R/2 | 制造商:Oshino Lamps 功能描述: |
| MD-577R/3 | 制造商:Oshino Lamps 功能描述: |
| MD-577Y/2 | 制造商:Oshino Lamps 功能描述: |
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