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参数资料
| 型号： | MD83C154CXXX-16P883D |
| 厂商： | TEMIC SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| 文件页数： | 76/242页 |
| 文件大小： | 61013K |
| 代理商： | MD83C154CXXX-16P883D |
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167
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
20.9
Multi-processor Communication Mode
Setting the Multi-processor Communication mode (MPCMn) bit in UCSRnA enables a filtering function of incoming
frames received by the USART Receiver. Frames that do not contain address information will be ignored and not
put into the receive buffer. This effectively reduces the number of incoming frames that has to be handled by the
CPU, in a system with multiple MCUs that communicate via the same serial bus. The Transmitter is unaffected by
the MPCMn setting, but has to be used differently when it is a part of a system utilizing the Multi-processor Com-
munication mode.
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indicates if the frame
contains data or address information. If the Receiver is set up for frames with nine data bits, then the ninth bit
(RXB8n) is used for identifying address and data frames. When the frame type bit (the first stop or the ninth bit) is
one, the frame contains an address. When the frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data from a master MCU. This
is done by first decoding an address frame to find out which MCU has been addressed. If a particular slave MCU
has been addressed, it will receive the following data frames as normal, while the other slave MCUs will ignore the
received frames until another address frame is received.
20.9.1
Using MPCMn
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ = 7). The ninth bit (TXB8n)
must be set when an address frame (TXB8n = 1) or cleared when a data frame (TXB = 0) is being transmitted. The
slave MCUs must in this case be set to use a 9-bit character frame format.
The following procedure should be used to exchange data in Multi-processor Communication mode:
1.
All Slave MCUs are in Multi-processor Communication mode (MPCMn in UCSRnA is set).
2.
The Master MCU sends an address frame, and all slaves receive and read this frame. In the Slave MCUs,
the RXCn Flag in UCSRnA will be set as normal.
3.
Each Slave MCU reads the UDRn Register and determines if it has been selected. If so, it clears the
MPCMn bit in UCSRnA, otherwise it waits for the next address byte and keeps the MPCMn setting.
4.
The addressed MCU will receive all data frames until a new address frame is received. The other Slave
MCUs, which still have the MPCMn bit set, will ignore the data frames.
5.
When the last data frame is received by the addressed MCU, the addressed MCU sets the MPCMn bit and
waits for a new address frame from master. The process then repeats from 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the Receiver must change
between using n and n+1 character frame formats. This makes full-duplex operation difficult since the Transmitter
and Receiver uses the same character size setting. If 5- to 8-bit character frames are used, the Transmitter must
be set to use two stop bit (USBSn = 1) since the first stop bit is used for indicating the frame type.
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCMn bit. The MPCMn bit shares the
same I/O location as the TXCn Flag and this might accidentally be cleared when using SBI or CBI instructions.
20.10 Examples of Baud Rate Setting
For standard XTAL and resonator frequencies, the most commonly used baud rates for asynchronous operation
can be generated by using the UBRRn settings in Table 20-4 on page 168. UBRRn values which yield an actual
baud rate differing less than 0.5% from the target baud rate, are bold in the table. Higher error ratings are accept-
able, but the Receiver will have less noise resistance when the error ratings are high, especially for large serial
frames (see ”Asynchronous Operational Range” on page 165). The error values are calculated using the following
equation:
Error[%]
BaudRate
Closest Match
BaudRate
--------------------------------------------------------
1
–
100%
=
相关PDF资料 |
PDF描述 |
|---|---|
| MR83C154CXXX-L16P883 | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| MR83C154TXXX-L16P883D | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| MQ83C154XXX-20/883 | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| MR80C154-25/883D | 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44 |
| MQ83C154XXX-30P883D | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MD83C154-L16 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-12 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-16 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-20 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MD83C154T-25 | 制造商:TEMIC 制造商全称:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
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