参数资料
型号: MIC2124YMM
厂商: Micrel Inc
文件页数: 15/24页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 10-MSOP
产品培训模块: MIC2124 Synchronous Current Mode DC-DC Buck Controller
标准包装: 100
系列: Hyper Speed Control™
PWM 型: 电流模式
输出数: 1
频率 - 最大: 360kHz
占空比: 93%
电源电压: 3 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 管件
其它名称: 576-3639-5
MIC2124YMM-ND
Micrel, Inc.
Feedback Loop Compensation
and the output inductor in the power stage:
MIC2124
The MIC2124 controller comes with an internal error
amplifier used for optimizing control loop stability by
placing a capacitor C1 in series with a resistor R1 and
f z ( con ) =
1
2 π × C OUT × ESR C OUT
(30)
another capacitor C2 in parallel from the COMP pin to
ground.
f p ( con ) =
1
2 π
× (
1
C OUT × R LOAD
+
1
f SW × L × C OUT
×
D
2
)
(31)
Therefore, type II compensation, which is comprised by
C1, R1 and C2, is able to achieve a stabilized loop for
MIC2124 in most applications.
b. g m Error Amplifier
It is undesirable to have high error amplifier gain at high
frequencies because high frequency noise spikes would
be picked up and transmitted at large amplitude to the
output; thus, gain should be permitted to fall off at high
frequencies. At low frequency, it is desired to have high
open-loop gain to attenuate the power line ripple. Thus,
1 + s × R1 × C1
= g m × ? ? (32)
G(s) err
? s × ( C1 + C2 ) × ? 1 + s × R1 × C1 + C2 ? ?
Figure 6. Loop Compensation
a. Power Stage
The adaptive on-time current mode control applied in
MIC2124 controller eliminates the double-pole in the
power stage, which is caused by the output inductor and
output capacitor. At the frequency range which is far
below the switching frequency (f < f SW /6), the transfer
function from the output of the error amplifier to the buck
converter output can be approximated by the following
equation:
the error amplifier gain should be allowed to increase
rapidly at low frequencies.
The transfer function with R1, C1, and C2 for the internal
g m error amplifier can be expressed as:
? ?
? ?
? ? C1 × C2 ? ?
? ? ? ?
One pole and one zero can be seen from the above
transfer function at the following frequencies:
G C =
R LOAD
1 +
R LOAD D
f z ( err ) =
(33)
f p ( err ) =
(34)
2 π × R 1 ×
where:
G(s) con ≈ G C ×
×
Ri
1 + s × C OUT × ESR C OUT
s
? p
1
1 + ×
f SW × L 2
(29)
1
2 π × R 1 × C 1
1
C1 × C2
C 1 + C 2
c. Total Open-Loop Response
The open-loop response for the MIC2124 controller is
? p =
1
C OUT × R LOAD
+
1
f SW × L × C OUT
×
D
2
easily obtained by combining the power stage, the
feedback resistor divider, and the error amplifier gains
together.
G ( s ) total =
× G(s) con × G ( s ) err (35)
C OUT = total output capacitors
ESR COUT = electrical series resistance of the output
capacitor
R LOAD = load resistance
Ri = 2.4 x Rds(on)_bottom (low-side MOSFET Rds(on))
f SW = switching frequency
L = inductance of the output inductor
D = duty cycle
According to equation (29), there is a pole and zero pair
set by the load resistance R LOAD , the output capacitor,
R FB 2
R FB 1 + R FB 2
where R FB1 and R FB2 are the voltage divider resistors, as
shown in the typical application schematic on Page 1.
It is desirable to have the gain curve intersect zero dB at
tens of kilohertz, this is commonly called crossover
frequency; the phase margin at crossover frequency
should be at least 45°.
12V to 1.8V @ 10A application is applied as an example
to demonstrate the loop compensation for MIC2124. In
this application:
June 2010
15
M9999-060810-D
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