参数资料
型号: MIC2310-1ZTS TR
厂商: Micrel Inc
文件页数: 18/34页
文件大小: 473K
描述: IC HOT SWAP CTLR 2CHAN 24TSSOP
标准包装: 2,500
类型: 热交换控制器
应用: 通用
内部开关:
电流限制: 可调
电源电压: 10.8 V ~ 13.2 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 带卷 (TR)
Micrel, Inc.
MIC2310
 
 
July 2008 
18
M9999-070108-A
 
VCC = 12V, nominal
VGSPGH
V
GSPGH
V
PGH
VPGL
t
POC
IPOC
VREG = 5V, nominal
t
RETRY
tPOR
CC & VREG
ENABLE
GATE
V
OUT
I
LOAD
CRETRY
PWRGD
I_FLT
DISCH
VVREG(UVLOH)
 
 
Figure 6. Primary Overcurrent Fault with Auto-Retry to Reset the Circuit Breaker
 
 
HW_FLT Digital Output Asserted by a MOSFET DG
Short with ENABLE = LOW
In order to protect the system from the result of the
installation of a damaged MOSFET on the PCB, the
controller   incorporates   a   MOSFET   shorted   DG
detection scheme whose operation is described in
Figure 7. With the applied V
CC
 supply high such that
the internal V
REG
  voltage is above the controllers
V
VREG(UVLOH)
 threshold voltage, an elapsed POR timer,
and with the ENABLE input LOW, a weak current sink
at the GATE pin attempts to hold the GATE voltage at
0V. If there is a DG short on the MOSFET, the weak
current sink is not capable of holding the voltage at 0V
as the GATE voltage tracks the MOSFETs DRAIN
voltage. The voltage monitor circuit at the controllers
GATE pin will be triggered once the GATE voltage
crosses   the   V
GATEFT(EXT)
   threshold   voltage.   The
HW_FLT digital output is subsequently asserted within
a delay approximately equal to the delay in the logic
circuits  no additional timing circuit is required. To
clear the latched GATE voltage monitor circuit and to
reset the HW_FLT digital output, the applied V
CC
 
supply voltage must fall such that V
REG
 is below the
controllers V
VREG(UVLOL)
 threshold voltage.
 
 
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