参数资料
型号: MJD45H11-1
厂商: ON SEMICONDUCTOR
元件分类: 功率晶体管
英文描述: 8 A, 80 V, PNP, Si, POWER TRANSISTOR
封装: DPAK-3
文件页数: 3/8页
文件大小: 0K
代理商: MJD45H11-1
MJD44H11 MJD45H11
http://onsemi.com
3
t, TIME (ms)
1
0.01
1 k
0.3
0.2
0.07
r(t)
,EFFECTIVE
TRANSIENT
THERMAL
RθJC(t) = r(t) RθJC
RθJC = 6.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) θJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.01
RESIST
ANCE
(NORMALIZED)
0.7
Figure 1. Thermal Response
0.5
0.1
0.05
0.03
0.02
0.02 0.03 0.05
0.1
0.2 0.3
0.5
1
2
3
5
10
20 30
50
100
200 300 500
0.2
SINGLE PULSE
D = 0.5
0.1
0.02
0.01
0.05
I C
,COLLECT
OR
CURRENT
(AMP)
20
1
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
0.02
3
100
2
0.5
5
0.1
THERMAL LIMIT @ TC = 25°C
WIRE BOND LIMIT
5
7
20
70
10
100 s
dc
0.05
0.3
1
3
10
50
30
Figure 2. Maximum Forward Bias
Safe Operating Area
1ms
500 s
5ms
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC – VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on TJ(pk) = 150
_C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
v 150_C. TJ(pk) may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
25
T, TEMPERATURE (°C)
0
50
75
100
125
150
20
15
10
5
P D
,POWER
DISSIP
ATION
(W
ATTS)
2.5
0
2
1.5
1
0.5
TA TC
Figure 3. Power Derating
TC
TA
SURFACE
MOUNT
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MJD44H11-1 8 A, 80 V, NPN, Si, POWER TRANSISTOR
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