ML66525 Family User’s Manual
Chapter 18
Media Control Function
18 - 15
(15) Redundancy part reserved data 1 register (HREV1)
When the sequencer reads the redundancy part, the bytes 512 and 513 of the redundancy part
are stored in this register.
Also, when the sequencer writes the redundancy part, the bytes 512
and 513 of the redundancy part are set beforehand in this register.
This corresponds to the reserved data in the SmartMedia format.
When the sequencer writes
data in the SmartMedia format (when bits 4 and 5 (HEAD0, 1) of the MSCTRL register are
both set to “0”), a fixed value of FFFFh is written into this register.
HREV1 can be read from and written to by the program.
When reset (RESn signal input, execution of a BRK instruction, overflow of the watchdog
timer, opcode trap), HREV1 becomes 0000H.
Figure 18-22 shows the HREV1 configuration.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HREV1
At reset
0
Redundancy part
reserved data 1
Redundancy part
reserved data 1
Figure 18-22
HREV1 Configuration
(16) Redundancy part reserved data 2 register (HREV2)
When the sequencer reads the redundancy part, the bytes 512 and 513 of the redundancy part
are stored in this register.
Also, when the sequencer writes the redundancy part, the bytes 512
and 513 of the redundancy part are set beforehand in this register.
This corresponds to the reserved data in the SmartMedia format.
When the sequencer writes
data in the SmartMedia format (when bits 4 and 5 (HEAD0, 1) of the MSCTRL register are
both set to “0”), a fixed value of FFFFh is written into this register.
HREV2 can be read from and written to by the program.
When reset (RESn signal input, execution of a BRK instruction, overflow of the watchdog
timer, opcode trap), HREV2 becomes 0000H.
Figure 18-23 shows the HREV2 configuration.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HREV2
At reset
0
Redundancy part reserved
data 1
Redundancy part reserved
data 1
Figure 18-23
HREV2 Configuration
Address : 1B20[H]
R/W access : R/W
Address : 1B22[H]
R/W access : R/W