Chapter 12
Serial Interface 2
Operation
XII - 10
Figure 12-3-1-1
Transfer bit Count and First Transfer bit (MSB First)
nStart Condition Setup
The SC2STE flag of the SC2MD0 register sets if start condition is enable or not. If a start condition is
enabled, the bit counter is cleared as start condition is input during communication. Then, the communi-
cation is automatically restarted. When the data line (SBI2 pin (with 3 channels) or SBO2 pin (with 2
channels)) changes from "H" to "L" as clock line(SBT2 pin) is "H", start condition is enabled.
nFirst Transfer bit Setup
The SC2DIR flag of the SC2MD0 register can set the first bit to be transferred. LSB or MSB can be
selected.
nTransmission, Reception Data Buffer
The transmission / receiption shift register SC2TRB is used as the common data register for transmis-
sion / reception. The transmission data should be set to SC2TRB. Data is shifted in 1-bit unit by transfer
clock, and the received data is shifted in 1-bit unit to SC2TRB to be stored.
nTransfer bit Count and First Transfer bit
When the transfer bit count is 1 to 7 bits, data storing method to the transmission / receiption shift
register SC2TRB is different, depending on the first transfer bit selection. When MSB is the first bit to be
transferred, use the upper bits of SC2TRB for storing. When there are 6 bits to be transferred, as shown
in figure 12-3-1-1, if data "A" to "F" are stored to bp2 to bp7 of SC2TRB, the data is transferred from "F"
to "A". When LSB is the first bit to be transferred, use the lower bits of SC2TRB for storing. When there
are 6 bits to be transferred, as shown in figure 13-3-1-2, if data "A" to "F" are stored to bp0 to bp5 of
SC2TRB, the data is transferred from "A" to "F".
Figure 12-3-1-2
Transfer bit Count and First Transfer bit (LSB First)
0
1
2
43
SC2TRB
C
D
A
B
E
5
6
7
F
0
1
2
43
SC2TRB
C
D
A
B
E
5
6
7
F