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| 型号： | MOBILE AMD-K6 |
| 厂商： | Advanced Micro Devices, Inc. |
| 英文描述： | 32 Bit Microprocessor With 64-K Byte Level-one Cache and Advanced RISC86 Superscalar Microarchitecture(32位微处理器带64K字节高速缓存和高级的RISC86超标量微体系结构) |
| 中文描述： | 32位微处理器的64亩字节的一级缓存和高级RISC86超标微架构（32位微处理器带64K的字节高速缓存和高级的RISC86超标量微体系结构） |
| 文件页数： | 14/108页 |
| 文件大小： | 2267K |
| 代理商： | MOBILE AMD-K6 |
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4
Mobile AMD-K6
Processor
Chapter 1
Mobile AMD-K6
Processor Data Sheet
21049H/0—September 1998
Preliminary Information
the I/O portion operates at the industry-standard 3.3V level. The 0.25-micron process
technology with the split-plane voltage design enables the mobile AMD-K6 processor
to deliver superior portable PC performance solutions while utilizing a lower
processor core voltage, which results in lower power consumption and longer battery
life. In addition, the mobile AMD-K6 processor includes the complete
industry-standard System Management Mode (SMM), which is critical to system
resource and power management. The mobile AMD-K6 processor also features the
industry-standard Stop-Clock (STPCLK#) control circuitry and the Halt instruction,
both required for implementing the ACPI specification. Finally, the mobile AMD-K6
processor is offered in either a lightweight, thermally-efficient, 360-ball Ball Grid
Array (CBGA) package that enables high-volume and low-cost SMT manufacturing, or
a standard socket 7-compatible, 321-pin Ceramic Pin Grid Array (CPGA) package.
The mobile AMD-K6 processor
’s RISC86 microarchitecture is a decoupled
decode/execution superscalar design that implements state-of-the-art design
techniques to achieve leading-edge performance. Advanced design techniques
implemented in the mobile AMD-K6 processor include multiple x86 instruction
decode, single-clock internal RISC operations, seven execution units that support
superscalar operation, out-of-order execution, data forwarding, speculative
execution, and register renaming. In addition, the processor supports the industry’s
most advanced branch prediction logic by implementing an 8192-entry branch history
table, the industry’s only branch target cache, and a return address stack, which
combine to deliver better than a 95% prediction rate. These design techniques
enable the mobile AMD-K6 to issue, execute, and retire multiple x86 instructions per
clock, resulting in excellent scaleable performance.
The mobile AMD-K6 processor is fully x86 binary code compatible. AMD’s extensive
experience through four generations of x86 processors has been carefully integrated
into the mobile AMD-K6 processor to provide complete compatibility with Windows
95, Windows 3.x, Windows NT, DOS, OS/2, Unix, Solaris, NetWare
, Vines, and other
leading x86 operating systems and applications. In addition, the mobile AMD-K6 is
Pentium
processor-bus compatible, allowing the processor to be quickly and easily
integrated into a mature and cost-effective industry-standard infrastructure of
chipsets, power supplies, and thermal designs.
AMD has designed, manufactured, and delivered over 50 million Microsoft
Windows-compatible processors in the last five years alone. The mobile AMD-K6
processor is the next generation in this long line of processors. With its combination
of state-of-the-art features, industry-leading performance, high-performance
multimedia engine, full x86 compatibility, and low-cost infrastructure, the mobile
AMD-K6 processor is the superior choice for leading-edge portable personal
computers.
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