参数资料
型号: MPC5554EVBE
厂商: Freescale Semiconductor
文件页数: 32/58页
文件大小: 0K
描述: BOARD EVAL FOR MPC5554
产品培训模块: MPC55xx PitchPak Family
标准包装: 1
系列: Qorivva
类型: MCU
适用于相关产品: MPC5554
所含物品: 评估板和演示软件
配用: MFR4310FRDC-ND - FRDC FLEXRAY DAUGHTER CARD
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MPC5554MZP132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA
MPC5554MVR132R2-ND - IC MCU 2M FLASH 132MHZ 416-PBGA
MPC5554MVR132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA
MPC5554AZP132-ND - IC MPU 2M FLASH 132MHZ 416-PBGA
MPC5554 Microcontroller Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
38
3.13.7
eMIOS Timing
Figure 17. eMIOS Timing
3.13.8
DSPI Timing
Table 25. eMIOS Timing 1
1 eMIOS timing specified at: V
DDEH = 3.0–5.25 V and TA = TL to TH.
Spec
Characteristic
Symbol
Min.
Max.
Unit
1
eMIOS input pulse width
tMIPW
4—
tCYC
2
eMIOS output pulse width
tMOPW
1 2
2 This specification does not include the rise and fall times. When calculating the minimum eMIOS pulse width, include the rise
and fall times defined in the slew rate control field (SRC) in the pad configuration register (PCR).
—tCYC
Table 26. DSPI Timing12
Spec
Characteristic
Symbol
80 MHz
112 MHz
132 MHz
Unit
Min.
Max.
Min.
Max.
Min.
Max.
1
SCK cycle time3, 4
tSCK
24.4 ns
2.9 ms
17.5 ns
2.1 ms
15.2 ns
1.7 ms
2
PCS to SCK delay5
tCSC
23
15
13
ns
3
After SCK delay6
tASC
22
14
12
ns
4
SCK duty cycle
tSDC
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
(tSCK 2)
– 2 ns
(tSCK 2)
+ 2 ns
ns
5
Slave access time
(SS active to SOUT driven)
tA
25
25
25
ns
6
Slave SOUT disable time
(SS inactive to SOUT Hi-Z, or invalid)
tDIS
25
25
25
ns
7PCSx to PCSS time
tPCSC
4—
4
4
ns
8PCSS to PCSx time
tPASC
5—
5
5
ns
1
2
eMIOS
output
eMIOS input
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