参数资料
型号: MPC8377EVRAGDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689
封装: 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件页数: 92/124页
文件大小: 1462K
代理商: MPC8377EVRAGDA
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
7
Electrical Characteristics
Compatible with the SD Memory Card Specification, Rev 2.0, and supports High Capacity SD
memory cards
Compatible with the SDIO Card Specification Rev, 1.2
Designed to work with SD Memory, miniSD Memory, SDIO, miniSDIO, SD Combo, MMC,
MMCplus, MMC 4x, and RS-MMC cards
SD bus clock frequency up to 50 MHz
Supports 1-/4-bit SD and SDIO modes, 1-/4-bit MMC modes
Supports internal DMA capabilities
2
Electrical Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8377E. The device is currently targeted to these specifications. Some of these specifications are
independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer
design specifications.
2.1
Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1
Absolute Maximum Ratings
Table 2 provides the absolute maximum ratings.
Table 2. Absolute Maximum Ratings 1
Characteristic
Symbol
Max Value
Unit
Notes
Core supply voltage
VDD
–0.3 to 1.1
V
PLL supply voltage (e300 core, system and eLBC)
AVDD
–0.3 to 1.1
V
DDR1 and DDR2 DRAM I/O voltage
GVDD
–0.3 to 2.75
–0.3 to 1.98
V—
Three-speed Ethernet I/O, MII management voltage
LVDD[1,2]
–0.3 to 3.63
V
PCI, DUART, system control and power management, I2C, and
JTAG I/O voltage
OVDD
–0.3 to 3.63
V
Local bus
LBVDD
–0.3 to 3.63
V
SerDes
L[1,2]_
nVDD
–0.3 to 1.1
V
Input voltage
DDR DRAM signals
MVIN
–0.3 to (GVDD + 0.3)
V
DDR DRAM reference
MVREF
–0.3 to (GVDD + 0.3)
V
Three-speed Ethernet signals
LVIN
–0.3 to (LVDD + 0.3)
V
PCI, DUART, CLKIN, system control and power
management, I2C, and JTAG signals
OVIN
–0.3 to (OVDD + 0.3)
V
Local Bus
LBIN
–0.3 to (LBVDD + 0.3)
V
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