参数资料
型号: MPC8378ECVRAGDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689
封装: 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689
文件页数: 23/125页
文件大小: 894K
代理商: MPC8378ECVRAGDA
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
119
Power and ground connections must be made to all external VDD, GVDD, LVDD, OVDD, and GND pins of the device.
24.4
Output Buffer DC Impedance
The device drivers are characterized over process, voltage, and temperature. For all buses, the driver is a push-pull single-ended
driver type (open drain for I2C).
To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to OVDD or GND. Then, the
value of each resistor is varied until the pad voltage is OVDD/2 (see Figure 69). The output impedance is the average of two
components, the resistances of the pull-up and pull-down devices. When data is held high, SW1 is closed (SW2 is open) and
RP is trimmed until the voltage at the pad equals OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN
are designed to be close to each other in value. Then, Z0 = (RP + RN)/2.
Figure 69. Driver Impedance Measurement
The value of this resistance and the strength of the driver’s current source can be found by making two measurements. First, the
output voltage is measured while driving logic 1 without an external differential termination resistor. The measured voltage is
V1 = Rsource Isource. Second, the output voltage is measured while driving logic 1 with an external precision differential
termination resistor of value Rterm. The measured voltage is V2 =(1/(1/R1 +1/R2)) Isource. Solving for the output impedance
gives Rsource = Rterm (V1/V2 – 1). The drive current is then Isource =V1/Rsource.
This table summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD, nominal OVDD,
105
C.
Table 79. Impedance Characteristics
Impedance
Local Bus, Ethernet,
DUART, Control,
Configuration, Power
Management
PCI Signals
(not including PCI
output clocks)
PCI Output Clocks
(including
PCI_SYNC_OUT)
DDR DRAM
Symbol
Unit
RN
42 Target
25 Target
42 Target
20 Target
Z0
W
RP
42 Target
25 Target
42 Target
20 Target
Z0
W
Differential
NA
ZDIFF
W
Note: Nominal supply voltages. See Table 2, Tj = 105C.
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
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