参数资料
型号: MPC8560CPX667JC
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 667 MHz, RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, PLASTIC, FCBGA-783
文件页数: 5/104页
文件大小: 1244K
代理商: MPC8560CPX667JC
MPC8560 Integrated Processor Hardware Specifications, Rev. 5
102
Freescale Semiconductor
Document Revision History
2.0
Section 1.1—Updated features list to coincide with latest version of the reference manual
Table 1 and Table 2— Addition of CPM to OVDD and OVIN; Addition of SYSCLK to OVIN
Table 2—Addition of notes 1 and 2
Table 3—Addition of note 1
Table 5—New
Section 4—New
Table 13—Addition of IVREF
Table 15—Modified maximum values for tDISKEW
Table 16—Added MSYNC_OUT to tMCKSKEW2
Section 6.2.1—Removed Figure 4, “DDR SDRAM Input Timing Diagram”
Section 7.1—Removed references to 2.5 V from first paragraph
Table 19 and Table 20—Modified “conditions” for IIH and I IL
Table 21—Addition of min and max for GTX_CLK125 reference clock duty cycle
Table 25—Addition of min and max for GTX_CLK125 reference clock duty cycle
Table 27—Addition of min and max for GTX_CLK125 reference clock duty cycle
Figure 17 and Figure 19—Changed LSYNC_IN to Internal clock at top of each figure
Table 34—Modified values for tFIIVKH, tNIIVKH, and tTDIVKH; addition of tPIIVKH and tPIIXKH.
Table 35—Modified values for tFEKHOX, tNIKHOX,tNEKHOX, tTDKHOX; addition of tPIKHOX.
Figure 16—New
Figure 30—New
Table 31—Removed row for tLBKHOX3
Table 44—New (AC timing of PCI-X at 66 MHz)
Table 54—Addition of note 19
Figure 61—Addition of jumper and note at top of diagram
Table 56—Changed max bus freq for 667 core to 166
Section 16.2.1—Modified first paragraph
Figure 50—Modified
Figure 53—New
Table 60—Modified thermal resistance data
Section 16.2.4.2—Modified first and second paragraphs
1.2
Section 1.1.1—Updated feature list.
Section 1.2.1.1—Updated notes for Table 1.
Section 1.2.1.2—Removed 5-V PCI interface overshoot and undershoot figure.
Section 1.2.1.3—Added this section to summarize impedance driver settings for various interfaces.
Section 1.4—Updated rows in Reset Initialization timing specifications table. Added a table with DLL and
PLL timing specifications.
Section 1.5.2.2—Updated note 6 of DDR SDRAM Output AC Timing Specifications table.
Section 1.7—Changed the minimum input low current from -600 to -15
μA for the RGMII DC electrical
characteristics.
Section 1.7.2—Changed LCS[3:4] to TSEC1_TXD[6:5]. Updated notes regarding LCS[3:4].
Section 1.13.2—Updated the mechanical dimensions diagram for the package.
Section 1.13.3—Updated the notes for LBCTL, TRIG_OUT, and ASLEEP.
Corrected pin assignments
for IIC_SDA and IIC_SCL. Corrected reserved pin assignment of V11 to U11. V11 is actually PCI_STOP.
Section 1.14.1—Updated the table for frequency options with respect to platform/CCB frequencies.
Section 1.14.4—Edited Frequency options with respect to memory bus speeds.
1.1
Section 1.6.1—Added symbols and note for the GTX_CLK125 timing parameters.
Section 1.11.3—Updated pin list table: LGPL5/LSDAMUX to LGPL5, LA[27:29] and LA[30:31] to
LA[27:31], TRST to TRST, added GBE Clocking section and EC_GTX_CLK125 signal.
Figure 50—Updated pin 2 connection information.
Table 63. Document Revision History (continued)
Rev.
Number
Date
Substantive Change(s)
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MPC8560CVT667JC 功能描述:微处理器 - MPU PQ 3 8560-DRACOM RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
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