参数资料
型号: MPC8569VTAUNLB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件页数: 110/126页
文件大小: 2847K
代理商: MPC8569VTAUNLB
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
PCI Express
Freescale Semiconductor
84
2.9.2.5
SerDes Transmitter and Receiver Reference Circuits
The following figure shows the reference circuits for SerDes data lane’s transmitter and receiver.
Figure 45. SerDes Transmitter and Receiver Reference Circuits
The DC and AC specification of SerDes data lanes are defined in each interface protocol section (SGMII, PCI Express, or Serial
Rapid IO) in this document based on the application usage
Note that external AC-coupling capacitor is required for the above three serial transmission protocols with the capacitor value
defined in the specification of each protocol section.
2.9.2.6
Clocking Dependencies
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm) of each other at all
times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.
2.10
PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8569E.
2.10.1
PCI Express DC Requirements for SD_REF_CLK and SD_REF_CLK
2.10.2
PCI Express DC Physical Layer Specifications
This section contains the DC specifications for the physical layer of PCI Express on this device.
50
Ω
Receiver
Transmitter
SD_TXn
SD_RXn
50
Ω
50
Ω
50
Ω
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